MT8924 Zarlink Semiconductor, MT8924 Datasheet - Page 5
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MT8924
Manufacturer Part Number
MT8924
Description
PCM Conference Circuit (PCC)
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT8924.pdf
(16 pages)
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Manufacturer
Quantity
Price
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Part Number:
MT8924AE
Manufacturer:
RENESAS
Quantity:
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MT8924AS
Manufacturer:
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Quantity:
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MT8924
Overflow Detection / Input Channel Attenuation
If the sum of the channels involved in one conference
exceeds the full scale value of the accumulator, an
overflow condition is generated which can be
monitored specifically by reading the status of the
overflow register. If an overflow condition occurs,
then each channel in a conference can be
independently attenuated if desired.
8-6
F1
0
0
1
1
B7 (sign bit) is the MSB and B0 is the LSB
F1-F0 corresponds to the D5-D4 bits of the control byte of Operating Mode Instruction 5
F0
0
1
0
1
+ Full Scale
+ 0 Level
- 0 Level
- Full Scale
+ Full Scale
+ 0 Level
- 0 Level
- Full Scale
+ Full Scale
+ 0 Level
- 0 Level
- Full Scale
+ Full Scale
+ 0 Level
- 0 Level
- Full Scale
Table 1 - PCM Noise Suppression Threshold Levels
A-Law
-Law
B7
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
B6
1
0
0
1
0
1
1
0
1
0
0
1
0
1
1
0
Table 2 - PCM Byte Format
Threshold
16/4096
32/4096
16/8159
32/8159
1/4096
9/4096
1/8159
9/8159
Noise
B5
1
0
0
1
1
0
0
1
0
1
1
0
0
1
1
0
B4
1
0
0
1
0
1
1
0
1
0
0
1
0
1
1
0
Alternatively, a conference in the overflow condition
can be detected using the OS signal in conjunction
with frame pulse F0i. OS will be low during the
second half of a general output channel slot time N,
if channel N belongs to a conference in overflow (see
Figure 11). This information can be used to control
input channel attenuation through software control.
1000 0000
1000 0100
1000 1000
1000 1111
1111 1111
1111 1011
1111 0111
1111 0000
+ve input
B7 - B0
B3
1
0
0
1
1
0
0
1
0
1
1
0
0
1
1
0
PCM Byte
B2
1
0
0
1
0
1
1
0
1
0
0
1
0
1
1
0
0000 0000
0000 0100
0000 1000
0000 1111
0111 1111
0111 1011
0111 0111
0111 0000
-ve input
B7 - B0
B1
1
0
0
1
1
0
0
1
0
1
1
0
0
1
1
0
Preliminary Information
B0
1
0
0
1
0
1
1
0
1
0
0
1
0
1
1
0
No Inversion
Even Bit Inversion
Odd Bit Inversion
Bit Inversion
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