MT93L04 Zarlink Semiconductor, MT93L04 Datasheet - Page 13

• Manufacturer Part Number: MT93L04
• Description: 128-channel Voice Echo Canceller
• Manufacturer: Zarlink Semiconductor

Pin Description (continued)
TDI_d3
TDO_d3
TCK_d3
TRSTB_d3
Test_En_d3
RESETB_d3
IRQB_d3
CSB_d3
R/WB_d3
B_d3
DSB_d3
Signal Name
Signal
Signal
Signal
Signal
ICO
Signal
Signal
Signal
Signal
Signal
Signal
Signal Type
BGA Ball #
W14
W15
W16
V13
Y14
Y15
V14
Y16
Y17
V15
Y18
Zarlink Semiconductor Inc.
MT93L04
13
Test Serial Data In (3.3 V Input). JTAG serial test
instructions and data are shifted in on this pin.
This pin is pulled high by an internal pull-up when
not driven.
Test Serial Data Out (Output). JTAG serial data
is output on this pin on the falling edge of TCK.
This pin is held in high impedance state when
JTAG scan is not enabled.
Test Clock (3.3 V Input). Provides the clock to
the JTAG test logic.
Test Reset (3.3 V Input). Asynchronously
initializes the JTAG TAP controller by putting it in
the Test-Logic-Reset state. This pin should be
pulsed low on power-up or held low, to ensure that
the MT93L00 is in the normal functional mode.
This pin is pulled by an internal pull-down when
not driven.
Internal Connection. Connected to VSS for
normal operation
Device Reset (Schmitt Trigger Input). An active
low resets the device and puts the MT93L00 into a
low-power stand-by mode.
When the RESET pin is returned to logic high
and a clock is applied to the MCLK pin, the
device will automatically execute initialization
routines, which preset all the Control and Status
Registers to their default power-up values.
Interrupt Request (Open Drain Output). This
output goes low when an interrupt occurs in any
channel. IRQ returns high when all the interrupts
have been read from the Interrupt FIFO Register.
A pull-up resistor (1 K typical) is required at this
output.
Data Strobe (Input). This active low input works
in conjunction with CS to enable the read and
write operations.
Chip Select (Input). This active low input is used
by a microprocessor to activate the
microprocessor port.
Read/Write (Input). This input controls the
direction of the data bus lines (D7-D0) during a
microprocessor access.
Data Transfer Acknowledgment (Open Drain
Output). This active low output indicates that a
data bus transfer is completed. A pull-up resistor
(1 K typical) is required at this output.
Signal Description
Data Sheet