AT91SAM7S256 ATMEL Corporation, AT91SAM7S256 Datasheet - Page 20

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AT91SAM7S256

Manufacturer Part Number
AT91SAM7S256
Description
AT91 ARM THUMB-BASED MICROCONTROLLERS
Manufacturer
ATMEL Corporation
Datasheet

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Power Management
Controller
Advanced Interrupt
Controller
20
AT91SAM7S256 Summary Preliminary
The Power Management Controller uses the Clock Generator outputs to provide:
The Master Clock (MCK) is programmable from a few hundred Hz to the maximum
operating frequency of the device.
The Processor Clock (PCK) switches off when entering processor idle mode, thus allow-
ing reduced power consumption while waiting for an interrupt.
Figure 8. Power Management Controller Block Diagram
the Processor Clock PCK
the Master Clock MCK
the USB Clock UDPCK
all the peripheral clocks, independently controllable
three programmable clock outputs
Controls the interrupt lines (nIRQ and nFIQ) of an ARM Processor
Individually maskable and vectored interrupt sources
8-level Priority Controller
Source 0 is reserved for the Fast Interrupt Input (FIQ)
Source 1 is reserved for system peripherals (RTT, PIT, EFC, PMC, DBGU,
etc.)
Other sources control the peripheral interrupts or external interrupts
Programmable edge-triggered or level-sensitive internal sources
Programmable positive/negative edge-triggered or high/low level-sensitive
external sources
Drives the normal interrupt of the processor
Handles priority of the interrupt sources
Higher priority interrupts can be served during service of lower priority
interrupt
MAINCK
PLLCK
MAINCK
SLCK
PLLCK
SLCK
PLLCK
Master Clock Controller
Programmable Clock Controller
/1,/2,/4,...,/64
Prescaler
USB Clock Controller
/1,/2,/4,...,/64
ON/OFF
Divider
/1,/2,/4
Prescaler
Processor
Controller
Idle Mode
Clock Controller
Clock
Peripherals
ON/OFF
usb_suspend
int
UDPCK
PCK
periph_clk[2..14]
pck[0..2]
MCK
6117AS–ATARM–20-Oct-04

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