AT91FR40162S ATMEL Corporation, AT91FR40162S Datasheet - Page 9

• Manufacturer Part Number: AT91FR40162S
• Description: MicroControllers
• Manufacturer: ATMEL Corporation

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Memory Controller
JTAG/ICE Debug
Internal Memories
having to desolder the device from the target board. In tri-state mode, all the output pin drivers
of the AT91R40008 microcontroller are disabled.
In tri-state mode, direct access to the Flash via external pins is provided. This enables produc-
tion Flash programming using classical Flash programmers prior to board mounting.
To enter tri-state mode, the NTRI pin must be held low during the last 10 clock cycles before
the rising edge of NRST. For normal operation, the NTRI pin must be held high during reset by
a resistor of up to 400 k .
NTRI is multiplexed with I/O line P21 and USART1 serial data transmit line TXD1.
ARM-standard embedded In-circuit Emulation is supported via the JTAG/ICE port. The pins
TDI, TDO, TCK and TMS are dedicated to this debug function and can be connected to a host
computer via the external ICE interface. In ICE Debug Mode, the ARM7TDMI core responds
with a non-JTAG chip ID that identifies the microcontroller. This is not fully IEEE1149.1
compliant.
The ARM7TDMI processor address space is 4G bytes. The memory controller decodes the
internal 32-bit address bus and defines three address spaces:
In any of these address spaces, the ARM7TDMI operates in little-endian mode only.
The AT91FR40162S microcontroller integrates 256K bytes of internal SRAM. It is 32 bits wide
and single-clock cycle accessible. Byte (8-bit), half-word (16-bit) and word (32-bit) accesses
are supported and are executed within one cycle. Fetching either Thumb or ARM instructions
is supported, and internal memory can store two times as many Thumb instructions as ARM
instructions.
The SRAM is mapped at address 0x0 (after the Remap command), allowing ARM7TDMI
exception vectors between 0x0 and 0x20 to be modified by the software.
Placing the SRAM on-chip and using the 32-bit data bus bandwidth maximizes the microcon-
troller performance and minimizes system power consumption. The 32-bit bus increases the
effectiveness of the use of the ARM instruction set and the processing of data that is wider
than 16 bits, thus making optimal use of the ARM7TDMI advanced performance.
Being able to dynamically update application software in the 256-Kbyte SRAM adds an extra
dimension to the AT91FR40162S.
The AT91FR40162S also integrates a 2-Mbyte Flash memory that is accessed via the Exter-
nal Bus Interface. All data, address and control lines, except for the Chip Select signal, are
connected within the device.
• Internal memories in the four lowest megabytes
• Middle space reserved for the external devices (memory or peripherals) controlled by the
• Internal peripherals in the four highest megabytes
EBI
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