AD8310 Analog Devices, AD8310 Datasheet - Page 13

• Manufacturer Part Number: AD8310
• Description: Fast Response, DC - 440 Mhz, Voltage Out, 90 DB Logarithmic Amplifier
• Manufacturer: Analog Devices

General Matching Procedure
For other center frequencies and source impedances, the following
method can be used to calculate the basic matching parameters.
Step 1: Tune Out C
At a center frequency f
capacitance C
temporary inductor L
when C
Step 2: Calculate C
Now having a purely resistive input impedance, we can calculate
the nominal coupling elements C
For the AD8310, R
at f
Step 3: Split C
Since we wish to provide the fully-balanced form of network
shown in Figure 29, two capacitors C1 = C2 each of nominally
twice C
a value of 14.24 pF in this example. Under these conditions, the
voltage amplitudes at INHI and INLO will be similar. A some-
what better balance in the two drives may be achieved when C1
is made slightly larger than C2, which also allows a wider range
of choices in selecting from standard values. For example,
capacitors of C1 = 15 pF and C2 = 13 pF may be used (making
C
Step 4: Calculate L
The matching inductor required to provide both L
just the parallel combination of these:
With L
plete this example of a match of 50
The nearest standard value of 270 nH may be used with only a
slight loss of matching accuracy. The voltage gain at resonance
depends only on the ratio of impedances, as given by
Slope and Intercept Adjustments
Where system (i.e., software) calibration is not available, the
adjustments shown in Figure 31 can be used, either singly or in
combination, to trim the absolute accuracy of the AD8310. The
log slope may be raised or lowered by VR1; the values shown
provide a calibration range of 10% (22.6 mV/dB to 27.4 mV/dB),
which includes full allowance for the variability in the value of
the internal resistances. The adjustment may be made by alter-
nately applying two fixed input levels, provided by an accurate
signal generator, spaced over the central portion of the dynamic
range, for example –60 dBV and –20 dBV.
REV. A
O
C
= 6.96 pF).
GAIN
= 100 MHz, C
IN
IN
O
, shown as C
= 1.4 pF. For example, at f
C
= 1.8 H and L
O
IN
O
20
2
can be made to disappear by resonating with a
Into Two Parts
log
IN
f
O
O
M
IN
C
L
is 1 k . Thus, if a match to 50
IN
M
and L
must be 7.12 pF and L
M
, whose value is given by
C
1
in the figure, can be used. This requires
R R
= L
L
, the shunt impedance of the input
R
O
R
IN
IN
IN
= 356 nH, the value of L
S
O
IN
M
L
O
w C
/(L
;
10
O
2
and L
1
IN
C
log
= 100 MHz, L
IN
L
+ L
at 100 MHz is 297.2 nH.
O
O
R
O
, using
R
)
IN
S
O
R R
2
must be 356 nH.
IN
f
IN
C
IN
M
M
and L
is needed,
= 1.8 H.
to com-
O
is
–13–
Alternatively, an AM-modulated signal, at about the center of
the dynamic range, may be used. For a modulation depth M,
expressed as a fraction, the decibel range between the peaks and
troughs over one cycle of the modulation period is given by
For example., using a generator output of –40 dBm with a 70%
modulation depth (M = 0.7), the decibel range is 15 dB, as the
signal varies from –47.5 dBm to –32.5 dBm.
The log intercept is adjustable by VR2 over a –3 dB range with
the component values shown. VR2 is adjusted while applying an
accurately-known CW signal, preferably near the lower end of the
dynamic range, in order to minimize the effect of any residual
uncertainty in the slope. For example, to position the intercept
to –80 dBm, a test level of –65 dBm may be applied and VR2
adjusted to produce a dc output of 15 dB above zero at 24 mV/dB,
which is 360 mV.
Increasing the Slope to a Fixed Value
It is also possible to increase the slope to a new fixed value and
thus increase the change in output for each decibel of input
change. A common example of this is the need to “map” the
output swing of the AD8310 into the input range of an analog-
to-digital converter (ADC) with a rail-to-rail input swing.
Alternatively, a situation might arise, when only a part of the
total dynamic range is required—say, just 20 dB—in an applica-
tion where the nominal input level is more tightly constrained
and a higher sensitivity to a change in this level is required. Of
course, the maximum output will be limited either by the load
resistance and the maximum output current rating of 25 mA, or
by the supply voltage (see Specifications). The slope may easily
be raised by adding a resistor from VOUT to BFIN as shown in
Figure 32. This alters the gain of the output buffer, by means of
stable positive feedback, from its normal value of four to an
effective value which may be as high as sixteen, corresponding
to a slope of 100 mV/dB. The resistor R
to the equation
SIGNAL
INPUT
dB
Figure 31. Slope and Intercept Adjustments
20
52.3
0.01 F
0.01 F
NC = NO CONNECT
C2
C1
log
R
10
SLOPE
1
1
0.01 F
INLO COMM OFLT VOUT
INHI ENBL BFIN VPOS
8
1
–
M
M
AD8310
7
2
1
–
NC
9 22
24
6
3
10k
10k
.
VR1
mV dB
Slope
5
4
k
/
SLOPE
4.7
FOR V
FOR V
24mV/dB
25k
R
is set according
AD8310
S
POS
POS
V
= 3V, R
= 5V, R
10%
OUT
VR2
100k
(RSSI)
S
S
(2.7–5.5V)
= 500k
= 850k
+V
(3)
S