nRF24E1 Nordic VLSI, nRF24E1 Datasheet - Page 10

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nRF24E1

Manufacturer Part Number
nRF24E1
Description
2.4Ghz RF Transceiver With Embedded 8051 Compatible Microcontroller And 9 Input, 10 Bit ADC
Manufacturer
Nordic VLSI
Datasheet

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PRODUCT SPECIFICATION
Table 2-1 : SFR Register map
The nRF24E1 has one programmable PWM output, which is the alternate function
of PO.7 at pin DIO9.
The resolution of the PWM is software programmable to 6, 7 or 8 bits.
The frequency of the PWM signal is programmable via a 6 bit prescaler from the
XTAL oscillator.
The duty cycle is programmable between 0% and 100% via one 8-bit register.
nRF24E1 features a simple single buffered SPI master. The 3 lines of the SPI bus
(SDI, SCK and SDO) are multiplexed (by writing to register SPI_CTRL) between the
GPIO pins (P1.2/DIN0, P1.0/DIO0 and P1.1/DIO1) and the RF transceiver. The SPI
hardware does not generate any chip select signal. The programmer will typically use
GPIO bits (from port P0) to act as chip selects for one or more external SPI devices.
When the SPI interfaces the RF transceiver, the chip selects are available in an
internal GPIO port, P2.
The device has 1 general purpose input and 10 general purpose bi-directional pins.
These are by default configured as GPIO pins controlled by the ports P0 (DIO2 to
DIO9) and P1 (DIO0, DIO1, DIN0) of the microcontroller.
Nordic VLSI ASA - Vestre Rosten 81, N-7075 Tiller, Norway - Phone +4772898900 - Fax +4772898989
Revision: 1.0
T2CON
RADIO
EICON
SCON
TCON
ACC
PSW
(P2)
EIP
EIE
P1
P0
IP
IE
B
RSTREAS
ADCCON
TMOD
SBUF
PWM
EXIF
CON
SP
RCAP2L
DATAH
MPAGE
_DATA
DUTY
PWM
DPL0
ADC
TL0
SPI
RCAP2H
DATAL
_CTRL
REGX
_MSB
DPH0
ADC
Qhtrà ÂsÃ(&
TL1
SPI
STATIC
T1_1V2
P0_DIR
REGX
DPL1
_LSB
ADC
CLK
TH0
TL2
SPI
P0_ALT
T2_1V2
_CTRL
TICK_
REGX
DPH1
TH2
TH1
DV
OFFSET
CKCON
P1_DIR
DEV_
CTRL
CK_
DPS
SPC_FNC
P1_ALT
TEST_
MODE
PCON
July 2003

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