al2007la Samsung Semiconductor, Inc., al2007la Datasheet
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al2007la
Manufacturer Part Number
al2007la
Description
Description = AL2007LA 20MHz ~ 170MHz FSPLL ;; Function = FSPLL ;; Configuration = 20MHz~170MHz PLL ;; Library Type = STD90 ;; Characteristic = 3.3V/3.5mA
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.AL2007LA.pdf
(16 pages)
0.35 m 20MHZ-170MHZ FSPLL
GENERAL DESCRIPTION
The AL2007LA is a Phase-Locked Loop (PLL) frequency synthesizer constructed in CMOS on single monolithic
structure. The PLL macrofunctions provide frequency multiplication capabilities.
The output clock frequency Fout is related to the reference input clock frequency Fin by the following equation:
Where, Fout is the output clock frequency. Fin is the reference input clock frequency. m,p and s are the values for
programmable dividers. AL2007LA consists of a phase/Frequency Detector(PFD), a Charge Pump an External
Loop Filter, a Voltage Controlled Oscillator(VCO), a 6bit Pre-divider, an 8bit Main divider and 2bit Post Scaler as
shown in Figure1.
FEATURES
— 0.35um CMOS device technology
— 3.3 Volt Single power supply
— VCO frequency range: 60~170MHz
— Output frequency range: 20~170MHz
— Jitter ±150ps
— Duty ratio 40% to 60% at 170MHz
— Frequency changed by programmable divider
— Power down mode
FUNCTIONAL BLOCK DIAGRAM
Fout = ( m*Fin ) / ( p* 2S)
Please contact SEC application engineer to confirm the proper selection of M,P,S value.
Fin
Pre Divider
P
Figure 1. Phase Lockd Loop Block Diagram
PFD
IMPORTANT NOTICE
Charge
Main Divider
Pump
M
(External)
Loop
Filter
VCO
Post Scaler
S
Fout
AL2007LA
1