16C6N5 Renesas Technology / Hitachi Semiconductor, 16C6N5 Datasheet - Page 78

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16C6N5

Manufacturer Part Number
16C6N5
Description
Renesas MCU
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
M16C/6N Group (M16C/6N5)
Rev.2.40
REJ03B0004-0240
Under development
This document is under development and its contents are subject to change.
Figure 5.24 Timing Diagram (3)
Aug 25, 2006
Measuring conditions :
Memory Expansion Mode and Microprocessor Mode
(For setting with no wait)
WR,WRL,
WRH
tcyc =
Write timing
BCLK
BCLK
VCC = 3.3 V
Input timing voltage : V
Output timing voltage : V
BHE
CSi
ADi
ALE
CSi
BHE
ALE
DBi
Read timing
ADi
RD
DBi
f(BCLK)
1
t
d(BCLK-AD)
t
d(BCLK-ALE)
t
(0.5 ✕ tcyc-60)ns.max
t
d(BCLK-ALE)
page 78 of 84
t
d(BCLK-CS)
d(BCLK-CS)
t
30ns.max
d(BCLK-AD)
30ns.max
30ns.max
30ns.max
30ns.max
Hi-Z
30ns.max
t
ac1(RD-DB)
tcyc
tcyc
t
50ns.min
SU(DB-RD)
t
IL
OL
d(BCLK-RD)
t
h(BCLK-ALE)
Hi-Z
= 0.6 V, V
= 1.65 V, V
t
h(BCLK-ALE)
30ns.max
-4ns.min
-4ns.min
IH
t
OH
= 2.7 V
h(BCLK-AD)
t
d(BCLK-WR)
t
h(BCLK-CS)
(0.5 ✕ tcyc-40)ns.min
t
d(BCLK-DB)
= 1.65 V
30ns.max
t
4ns.min
40ns.max
h(BCLK-RD)
0ns.min
0ns.min
t
t
d(DB-WR)
t
0ns.min
h(RD-DB)
h(RD-AD)
4ns.min
(0.5 ✕ tcyc-10)ns.min
t
t
h(WR-AD)
(0.5 ✕ tcyc-10)ns.min
h(BCLK-WR)
t
0ns.min
h(WR-DB)
t
h(BCLK-CS)
t
t
h(BCLK-DB)
h(BCLK-AD)
4ns.min
4ns.min
4ns.min
5. Electric Characteristics (Normal-ver.)
VCC = 3.3 V

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