MAX791 Maxim, MAX791 Datasheet - Page 15

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MAX791

Manufacturer Part Number
MAX791
Description
Microprocessor Supervisory Circuit
Manufacturer
Maxim
Datasheet

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5
VBATT has the same operating voltage range as V
and the battery-switchover threshold voltages are typi-
cally ±30mV centered at VBATT, allowing use of a
SuperCap and a simple charging circuit as a backup
source (Figure 12).
If V
above V
until the voltage at VBATT is less than 0.5V above V
For example, with a SuperCap connected to VBATT
and through a diode to V
from 5.4V to 4.9V, the capacitor discharges through
V
Figure 14. Adding Hysteresis to the Power-Fail Comparator
OUT
CC
PFO
+5V
R1
R2
0V
and V
is above the reset threshold and VBATT is 0.5V
V IN
0V
CC
V
V
, current flows to V
TRIP
H
= 1.25 /
R3
CC
= 1.25
TO P
Using SuperCaps or MaxCaps
until VBATT reaches 5.3V typical.
R1 + R2
R1 + R2
______________________________________________________________________________________
C1*
R2
R2
||
R3
||
R3
CC
PFI
PFO
OUT
, if V
Microprocessor Supervisory Circuit
VL - 1.25
V
with the MAX791
MAX791
L
R1
and V
GND
CC
+5V
V
V
CC
TRIP
V
IN
+
quickly changes
5 - 1.25
V
CC
H
R3
from VBATT
*OPTIONAL
=
1.25
R2
CC
CC
,
.
Leakage current through the SuperCap charging diode
and MAX791 internal power diode eventually dis-
charges the SuperCap to V
start from 0.5V above the reset threshold and power is
lost at V
through V
the MAX791 then switches to battery-backup mode and
the current through V
If using separate power supplies for V
VBATT must be less than 0.3V above V
above the reset threshold. As described in the previous
section, if VBATT exceeds this limit and power is lost at
V
the VBATT-to-V
until the circuit is broken (Figure 10).
Using memory devices with CE and CE inputs allows
the MAX791 CE loop to be bypassed. To do this, con-
nect CE IN to ground, pull up CE OUT to V
connect CE OUT to the CE input of each memory
device (Figure 13). The CE input of each part then con-
nects directly to the chip-select logic, which does not
have to be gated by the MAX791.
Hysteresis adds a noise margin to the power-fail com-
parator and prevents repeated triggering of PFO when
VIN is near the power-fail comparator trip point. Figure
14 shows how to add hysteresis to the power-fail com-
parator. Select the ratio of R1 and R2 such that PFI
sees 1.25V when VIN falls to the desired trip point
(V
an order of magnitude greater than R1 or R2. The cur-
rent through R1 and R2 should be at least 1µA to
ensure that the 25nA (max) PFI input current does not
shift the trip point. R3 should be larger than 10kΩ to
prevent it from loading down the PFO pin. Capacitor C1
adds additional noise rejection.
CC
TRIP
, current flows continuously from VBATT to V
). Resistor R3 adds hysteresis. It will typically be
CC
CC
, the SuperCap on VBATT discharges
until VBATT reaches the reset threshold;
Using Separate Power Supplies
OUT
Alternative Chip-Enable Gating
diode and the V
CC
Adding Hysteresis to the
goes to zero (Figure 10).
Power-Fail Comparator
CC
. Also, if V
for VBATT and V
OUT
CC
CC
CC
-to-V
when V
and VBATT,
and VBATT
CC
OUT
CC
switch
, and
CC
CC
via
15
is

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