LPC2101 Philips Semiconductors (Acquired by NXP), LPC2101 Datasheet - Page 8

• Manufacturer Part Number: LPC2101
• Manufacturer: Philips Semiconductors (Acquired by NXP)

Philips Semiconductors
Table 3:
LPC2101_02_03_1
Preliminary data sheet
Symbol
P0.21/SSEL1/
MAT3.0
P0.22/AD0.0
P0.23/AD0.1
P0.24/AD0.2
P0.25/AD0.6
P0.26/AD0.7
P0.27/TRST/
CAP2.0
P0.28/TMS/
CAP2.1
P0.29/TCK/
CAP2.2
P0.30/TDI/
MAT3.3
P0.31/TDO
RTXC1
RTXC2
RTCK
X1
X2
DBGSEL
RST
V
SS
Pin description
LQFP48
3
32
33
34
38
39
8
9
10
15
16
20
25
26
11
12
27
6
7, 19, 43
[4]
[4]
[4]
[4]
[1]
[1]
[1]
[1]
[4]
[4]
[4]
[5]
[5]
[5]
…continued
PLCC44
9
35
36
37
41
n.c.
13
14
15
20
21
24
29
n.c.
1, 12, 23
16
17
30
11
[4]
[4]
[1]
[1]
[1]
[4]
[4]
[4]
[4]
[4]
[5]
[5]
Type
I/O
I
O
I/O
I
I/O
I
I/O
I
I/O
I
I/O
I
I/O
I
I
I/O
I
I
I/O
I
I
I/O
I
O
O
O
I
O
I/O
I
O
I
I
I
Rev. 01 — 18 January 2006
Description
P0.21 — General purpose Input/output digital pin (GPIO).
SSEL1 — Slave Select for SPI1. Selects the SPI interface as
a slave.
MAT3.0 — PWM output for Timer 3, channel 0.
P0.22 — General purpose Input/output digital pin (GPIO).
AD0.0 — ADC 0, input 0.
P0.23 — General purpose Input/output digital pin (GPIO).
AD0.1 — ADC 0, input 1.
P0.24 — General purpose Input/output digital pin (GPIO).
AD0.2 — ADC 0, input 2.
P0.25 — General purpose Input/output digital pin (GPIO).
AD0.6 — ADC 0, input 6.
P0.26 — General purpose Input/output digital pin (GPIO).
AD0.7 — ADC 0, input 7.
P0.27 — General purpose Input/output digital pin (GPIO).
TRST — Test Reset for JTAG interface.
CAP2.0 — Capture input for Timer 2, channel 0.
P0.28 — General purpose Input/output digital pin (GPIO).
TMS — Test Mode Select for JTAG interface.
CAP2.1 — Capture input for Timer 2, channel 1.
P0.29 — General purpose Input/output digital pin (GPIO).
TCK — Test Clock for JTAG interface.
CAP2.2 — Capture input for Timer 2, channel 2.
P0.30 — General purpose Input/output digital pin (GPIO).
TDI — Test Data In for JTAG interface.
MAT3.3 — PWM output 3 for Timer 3.
P0.31 — General purpose output only digital pin (GPIO).
TDO — Test Data Out for JTAG interface.
Input to the RTC oscillator circuit.
Output from the RTC oscillator circuit.
Returned test clock output: Extra signal added to the JTAG
port. Assists debugger synchronization when processor
frequency varies. Bidirectional pin with internal pull-up.
Input to the oscillator circuit and internal clock generator
circuits.
Output from the oscillator amplifier.
Debug select: When LOW, the part operates normally. When
HIGH, debug mode is entered. Input with internal pull-down.
External reset input: A LOW on this pin resets the device,
causing I/O ports and peripherals to take on their default
states and processor execution to begin at address 0. TTL
with hysteresis, 5 V tolerant.
Ground: 0 V reference.
Single-chip 16-bit/32-bit microcontrollers
LPC2101/2102/2103
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
8 of 32