LPC2131 Philips Semiconductors (Acquired by NXP), LPC2131 Datasheet - Page 18

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LPC2131

Manufacturer Part Number
LPC2131
Description
Manufacturer
Philips Semiconductors (Acquired by NXP)
Datasheet

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Preliminary data sheet
6.13.1 Features
6.14.1 Features
6.13 UARTs
6.14 I
The LPC2131/2132/2138 each contain two UARTs. In addition to standard transmit and
receive data lines, the LPC2138 UART1 provides a full modem control handshake
interface, too.
The LPC2131/2132/2138 each contain two I
The I
(SCL), and a serial data line (SDA). Each device is recognized by a unique address and
can operate as either a receiver-only device (e.g., an LCD driver or a transmitter with the
capability to both receive and send information (such as memory)). Transmitters and/or
receivers can operate in either master or slave mode, depending on whether the chip has
to initiate a data transfer or is only addressed. The I
controlled by more than one bus master connected to it.
The I
I
2
2
C).
C-bus serial I/O controller
16 byte Receive and Transmit FIFOs.
Register locations conform to ‘550 industry standard.
Receiver FIFO trigger points at 1, 4, 8, and 14 bytes
Built-in baud rate generator.
Standard modem interface signals included on UART1. (LPC2138 only)
The LPC2131/2132/2138 transmission FIFO control enables implementation of
software (XON/XOFF) flow control on both UARTs and hardware (CTS/RTS) flow
control on the LPC2138 UART1 only.
Standard I
Easy to configure as Master, Slave, or Master/Slave.
Programmable clocks allow versatile rate control.
Bidirectional data transfer between masters and slaves.
Multi-master bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
The I
2
2
C-bus is bi-directional, for inter-IC control using only two wires: a serial clock line
C-bus implemented in LPC2131/2132/2138 supports bit rates up to 400 kbit/s (Fast
2
C-bus may be used for test and diagnostic purposes.
2
C compliant bus interface.
Rev. 01 — 18 November 2004
2
C-bus controllers.
LPC2131/2132/2138
Single-chip 16/32-bit microcontrollers
2
C-bus is a multi-master bus, it can be
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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