AT91M55800A ATMEL Corporation, AT91M55800A Datasheet - Page 4

• Manufacturer Part Number: AT91M55800A
• Description: The AT91M55800A Features 8K Bytes of On-chip SRAM, an External Bus Interface, a 6-channel Timer/Counter, 3 Usarts, a Master/slave Spi Interface, a Watchdog Timer, an 8-channel 10-bit ADC, a 2-channel 10-bit DAC, a Clock Generator, Real-time Clock And
• Manufacturer: ATMEL Corporation

5. Unpredictable Result in APMC State Machine on Switch from Oscillator to PLL
4. Clock Switching with the Prescaler in the APMC is not Permitted
3. Initializing SPI in Master Mode May Cause a Mode Fault Detection
Problem Fix/Workaround
2. V
1. SPI in Slave Mode does not Work
4
An automatic switch from the main oscillator output (CSS = 1) may cause an unpredictable result in the APMC state
machine. The automatic PLL to PLL transition is also effected by this problem.
Problem Fix/Workaround
The user must either wait for the PLL lock flag to be set in the APMC status register or switch to an intermediate 32 kHz
oscillator output (CSS = 0).
Switching from the selected clock (PRES = 0) to the selected clock divided by 4 (PRES = 2), 8 (PRES = 3) or 64 (PRES
= 6) may lead to unpredictable results.
Problem Fix/Workaround
First, the user should switch to any other value (PRES = 1, 4 or 5) and wait for the actual switch to perform (at least 64
cycles of the selected clock). Then, the user can write the final prescaler value.
In order to prevent this error, the user must pull up the PA26/NPCS0/NSS pin to the V
The battery supply voltage consumption is not guaranteed in the case of internal peripheral accesses.
Problem Fix/Workaround
The user should minimally access the Advanced Peripheral Bus by using an interrupt-driven driver rather than polling
methods.
In transmission, the data to be transmitted (written in SP_TDR) is transferred in the shift register and, consequently, the
TDRE bit in SP_SR is set to 1. Though the transfer has not begun, when the following data are written in SP_TDR, they
are also transferred into the shift register, crushing the precedent data and setting the bit TDRE to 1.
Problem Fix/Workaround
No problem fix/workaround to propose.
DDBU
AT91M55800A Errata Sheet
Consumption is not Guaranteed
DDIO
power supply.
1780B–01/02