MAX6302 Maxim, MAX6302 Datasheet - Page 9

• Manufacturer Part Number: MAX6302
• Description: +5V / Low-Power uP Supervisory Circuits with Adjustable Reset/Watchdog
• Manufacturer: Maxim

Figure 6. Adding a Manual Reset Function
Since RESET is open-drain, the MAX6301 interfaces
easily with µPs that have bidirectional reset pins, such
as the Motorola 68HC11 (Figure 7). Connecting RESET
directly to the µP’s reset pin with a single pull-up allows
either device to assert reset.
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, these supervisors
are relatively immune to short-duration negative-going
transients (glitches). The graph Maximum Transient
Duration vs. Reset Threshold Overdrive in the Typical
Operating Characteristics shows this relationship.
The area below the curves of the graph is the region in
which these devices typically do not generate a reset
pulse. This graph was generated using a negative-
going pulse applied to V
reset threshold (V
nitude indicated (reset-threshold overdrive). As the
magnitude of the transient increases (farther below the
reset threshold), the maximum allowable pulse width
decreases. Typically, a V
below the reset threshold and lasts 50µs or less will not
cause a reset pulse to be issued.
In extended mode (WDS = V
nally driven through a buffer and series resistor from
the watchdog counter (Figure 8). When WDI is left
unconnected, the watchdog timer is serviced within the
Negative-Going V
V
CC
RST
_______________________________________________________________________________________
+5V, Low-Power µP Supervisory Circuits
R1
R2
) and ending below it by the mag-
RESET IN
Bidirectional Reset Pins
Watchdog Input Current
CC
MAX6301
MAX6302
MAX6303
MAX6304
Interfacing to µPs with
IN
, starting above the actual
CC
transient that goes 100mV
), the WDI input is inter-
V
CC
with Adjustable Reset/Watchdog
CC
Extended Mode
Transients
0.1µF
watchdog timeout period by a very brief low-high-low
pulse from the counter chain. For minimum watchdog
input current (minimum overall power consumption),
leave WDI low for the majority of the watchdog timeout
period, pulsing it low-high-low (>30ns) once within the
period to reset the watchdog timer. If instead WDI is
externally driven high for the majority of the timeout
period, typically 70µA can flow into WDI.
In normal mode (WDS = GND), the internal buffer that
drives WDI is disabled. In this mode, WDI is a standard
CMOS input and leakage current is typically 100pA,
regardless of whether WDI is high or low.
Figure 7. Interfacing to µPs with Bidirectional Reset I/O Pins
Figure 8. Watchdog Input Structure
WDS
WDI
GND
MAX6301
RESET
V
CC
0.1µF
V
CC
TO MODE
CONTROL
WATCHDOG
4.7k
TIMER
MAX6301
MAX6302
MAX6303
MAX6304
GENERATOR
TO RESET
RESET
Normal Mode
V
µP
CC
RESET TO
OTHER SYSTEM
COMPONENTS
9