MAX6302 Maxim, MAX6302 Datasheet - Page 10

• Manufacturer Part Number: MAX6302
• Description: +5V / Low-Power uP Supervisory Circuits with Adjustable Reset/Watchdog
• Manufacturer: Maxim

When V
ing (sourcing) capabilities decline drastically. In the
case of the MAX6303, high-impedance CMOS-logic
inputs connected to RESET can drift to undetermined
voltages. This presents no problem in most applica-
tions, since most µPs and other circuitry do not operate
with V
In those applications where RESET must be valid down
to 0V, adding a pull-down resistor between RESET and
ground sinks any stray leakage currents, holding
RESET low (Figure 9). The value of the pull-down resis-
tor is not critical; 100kΩ is large enough not to load
RESET and small enough to pull RESET to ground. For
applications using the MAX6304, a 100kΩ pull-up resis-
tor between RESET and V
V
To help the watchdog timer monitor software execution
more closely, set and reset the watchdog input at differ-
ent points in the program, rather than “pulsing” the
watchdog input high-low-high or low-high-low. This
technique avoids a “stuck” loop in which the watchdog
timer would continue to be reset within the loop, keep-
ing the watchdog from timing out.
Figure 11 shows an example of a flow diagram where
the I/O driving the watchdog input is set high at the
beginning of the program, set low at the beginning of
every subroutine or loop, then set high again when the
program returns to the beginning. If the program should
“hang” in any subroutine the problem would quickly be
+5V, Low-Power µP Supervisory Circuits
with Adjustable Reset/Watchdog
Figure 9. Ensuring RESET Valid to V
10
CC
Down to V
falls below 1V (Figure 10).
______________________________________________________________________________________
CC
Ensuring a Valid RESET /RESET Output
CC
below 1V.
Watchdog-Software Considerations
falls below 1V, RESET/RESET current sink-
CC
MAX6303
GND
= 0V (MAX6303/MAX6304)
RESET
CC
V
CC
will hold RESET high when
CC
= 0V
V
CC
100k
0.1µF
corrected, since the I/O is continually set low and the
watchdog timer is allowed to time out, causing a reset
or interrupt to be issued. When using extended mode,
as described in the Watchdog Input Current section,
this scheme does result in higher average WDI input
current than does the method of leaving WDI low for the
majority of the timeout period and periodically pulsing it
low-high-low.
Figure 10. Ensuring RESET Valid to V
Figure 11. Watchdog Flow Diagram
MAX6304
GND
SUBROUTINE OR
PROGRAM LOOP
SET WDI HIGH
RESET
SET WDI
RETURN
START
V
LOW
END
CC
CC
V
0.1µF
CC
= 0V
100k