MAX5137 Maxim Integrated Products, MAX5137 Datasheet - Page 11

• Manufacturer Part Number: MAX5137
• Description: (MAX5134 - MAX5137) Voltage-Output DACs
• Manufacturer: Maxim Integrated Products

www.datasheet4u.com
The MAX5134/MAX5136 DAC code is unipolar binary
with V
MAX5137 DAC code is unipolar binary with V
(code/4096) x V
commands.
Connect the MAX5134–MAX5137 DVDD supply to the
supply of the host DSP or microprocessor. The AVDD
supply may be set to any voltage within the operating
range of 2.7V to 5.25V, but must be greater than or
equal to the DVDD supply.
Write to the MAX5134–MAX5137 using the following
sequence:
1) Drive CS low, enabling the shift register.
2) Clock 24 bits of data into DIN (C7 first and D0 last),
Figure 2. Connections for MICROWIRE
Figure 4. READY Timing
observing the specified setup and hold times. Bits
READY 1
READY 2
READY 3
*THE READY-TO-SI CONNECTION IS NOT REQUIRED FOR WRITING TO THE DEVICES
*BUT MAY BE USED FOR TRANSMISSION VERIFICATION.
SCLK
DIN
OUT_
CS
= (code/65,536) x V
MAX5134–
MAX5137
1
REF
2
______________________________________________________________________________________
READY*
. See Table 1 for the serial interface
3
SCLK
DIN
CS
4
SLAVE 1 DATA
Writing to the Devices
20
SO
SK
SI*
I/O
21
REF
22
MICROWIRE
PORT
. The MAX5135/
16-/12-Bit, Voltage-Output DACs
23 24
1
OUT_
2
3
Pin-/Software-Compatible,
=
4
SLAVE 2 DATA
5
3) After clocking in the last data bit, drive CS high. CS
Figure 1 shows a write operation for the transmission of
24 bits. If CS is driven high at any point prior to receiving
24 bits, the transmission is discarded.
Connect READY to a microcontroller (µC) input to moni-
tor the serial interface for valid communications. The
READY pulse appears 24 clock cycles after the nega-
tive edge of CS (Figure 4). Since the MAX5134–
MAX5137 look at the first 24 bits of the transmission fol-
lowing the falling edge of CS, it is possible to daisy
chain devices with different command word lengths.
READY goes high 16ns after CS is driven high.
Figure 3. Connections for SPI/QSPI
D15–D0 are the data bits that are written to the
internal register.
must remain high for 33ns before the next transmis-
sion is started.
21
*THE READY-TO-MISO CONNECTION IS NOT REQUIRED FOR WRITING TO THE
DEVICES BUT MAY BE USED FOR TRANSMISSION VERIFICATION.
22
23 24
MAX5134–
MAX5137
1
READY*
SCLK
2
DIN
CS
3
4
SLAVE 3 DATA
5
MOSI
MISO*
SCK
I/O
21
SPI/QSPI
+5V
PORT
SS
22
23 24
READY
11