MAX5130 Maxim Integrated Products, MAX5130 Datasheet - Page 11

• Manufacturer Part Number: MAX5130
• Description: (MAX5130 / MAX5131) Voltage-output DACs
• Manufacturer: Maxim Integrated Products

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Table 1. Serial-Interface Programming Commands
X = Don’t care
The power-down lockout pin (PDL) disables shutdown
when low. When in shutdown mode, a high-to-low tran-
sition on PDL will wake up the DAC with its output still
set to the state prior to power-down. PDL can also be
used to wake up the device asynchronously.
Pulling PD high places the MAX5130/MAX5131 in shut-
down mode. Pulling PD low will not return the MAX5130/
MAX5131 to normal operation. A high-to-low transition
on PDL or appropriate commands (Table 1) via the ser-
ial interface are required to exit power-down.
The MAX5130/MAX5131 3-wire serial interface is com-
patible with SPI, QSPI, PIC16/PIC17 (Figure 4) and
MICROWIRE (Figure 5) interface standards. The 2-byte-
long serial input word contains three control bits and 13
data bits in MSB-first format (Table 2).
The MAX5130/MAX5131’s digital inputs are double
buffered, which allows the user to:
Load the input register without updating the DAC
register,
Update the DAC register with data from the input
register,
Update the input and DAC registers concurrently.
C2
0
0
0
0
1
1
1
1
1
+3V/+5V, 13-Bit, Serial Voltage-Output DACs
(SPI/QSPI/MICROWIRE/PIC16/PIC17)
C1
0
0
1
1
0
0
1
1
1
16-BIT SERIAL WORD
Serial-Interface Configuration
______________________________________________________________________________________
Power-Down Lockout Input
C0
0
1
0
1
1
0
0
1
1
Power-Down Input (PD)
D12 ............... D0
XXXXXXXXXXXXX
XXXXXXXXXXXXX
XXXXXXXXXXXXX
XXXXXXXXXXXXX
XXXXXXXXXXXXX
1XXXXXXXXXXXX
00XXXXXXXXXXX
13-Bit DAC Data
13-Bit DAC Data
(PDL)
No operation.
Load input register; DAC register unchanged.
Simultaneously load input and DAC registers; exit shutdown.
Update DAC register from input register; exit shutdown.
Shutdown DAC (provided PDL = 1).
UPO goes low (default).
UPO goes high.
Mode 1; DOUT clocked out on SCLK’s rising edge.
Mode 0; DOUT clocked out on SCLK’s falling edge (default).
with Internal Reference
Figure 4. SPI/QSPI Interface Connections (PIC16/PIC17)
Figure 5. MICROWIRE Interface Connections
( ): PIC16/PIC17 ONLY
MAX5130
MAX5131
MAX5130
MAX5131
SCLK
SCLK
DIN
DIN
CS
CS
FUNCTION
CPOL = 0, CPHA = 0
(CHE = 1, CKP = 0, SMP = 0,
SSPM3–SSPM0 = 0001)
SK
SO
I/O
MOSI
SCK
I/O
(PIC16/PIC17)
MICROWIRE
SPI/QSPI
PORT
PORT
V
SS
DD
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