CDK2000 Cirrus Logic, Inc., CDK2000 Datasheet

CDK2000

Manufacturer Part Number

CDK2000

Description

Fractional-n Clock Multiplier with Internal LCO

Manufacturer

Cirrus Logic, Inc.

Datasheet

1.CDK2000.pdf (26 pages)

Current page: 1 of 26
Download datasheet (170Kb)

Features



Frequency Reference

Clock Multiplier / Jitter Reduction

Internal LCO Reference Clock

Highly Accurate PLL Multiplication Factor

One-Time Programmability

Minimal Board Space Required

–

http://www.cirrus.com

50 Hz to 30 MHz

Hardware Control

Output to Input

Generates a Low Jitter 6 - 75 MHz Clock

from a Jittery 50 Hz to 30 MHz Clock

Source

Maximum Error Less Than 1 PPM in High-

Resolution Mode

Configurable Hardware Control Pins

Configurable Auxiliary Output

No External Analog Loop-filter

Components

Clock Ratio

Fractional-N Clock Multiplier with Internal LCO

Hardware Configuration

LCO

Digital PLL & Fractional

N Logic

Frequency Synthesizer

General Description

The CS2300-OTP is an extremely versatile system

clocking device that utilizes a programmable phase lock

loop. The CS2300-OTP is based on a hybrid analog-

digital PLL architecture comprised of a unique combina-

tion

Synthesizer and a Digital PLL. This architecture allows

for generation of a low-jitter clock relative to an external

noisy synchronization clock with frequencies as low as

50 Hz. The CS2300-OTP has many configuration op-

tions which are set once prior to runtime. At runtime

there are three hardware configuration pins available for

mode and feature selection.

The CS2300-OTP is available in a 10-pin MSOP pack-

age in Commercial (-10°C to +70°C) grade. Customer

development kits are also available for custom device

prototyping, small production programming, and device

evaluation. Please see

page 25

3.3 V

Fractional-N

Frequency Reference

PLL Output

Lock Indicator

for complete details.

Delta-Sigma

CS2300-OTP

“Ordering Information” on

Fractional-N

Auxiliary

Output

6 to 75 MHz

PLL Output

Frequency

DS844F1

AUG '09

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