MAX1246 Maxim, MAX1246 Datasheet - Page 18

• Manufacturer Part Number: MAX1246
• Description: +2.7V / Low-Power / 4-Channel / Serial 12-Bit ADCs in QSOP-16
• Manufacturer: Maxim

+2.7V, Low-Power, 4-Channel,
Serial 12-Bit ADCs in QSOP-16
Figure 14. MAX1246 FULLPD/FASTPD Power-Up Sequence
Figure 13b shows the power consumption with
external-reference compensation in fast power-down,
with one and four channels converted. The external
4.7µF compensation requires a 200µs wait after
power-up with one dummy conversion. This circuit
combines fast multi-channel conversion with the lowest
power consumption possible. Full power-down mode
may provide increased power savings in applications
where the MAX1246/MAX1247 are inactive for long
periods of time, but where intermittent bursts of
high-speed conversions are required.
The MAX1246 can be used with an internal or external
reference voltage, whereas an external reference is
required for the MAX1247. An external reference can
be connected directly at VREF or at the REFADJ pin.
An internal buffer is designed to provide 2.5V at
VREF for both the MAX1246 and the MAX1247. The
MAX1246’s internally trimmed 1.21V reference is buf-
fered with a 2.06 gain. The MAX1247’s REFADJ pin is
also buffered with a 2.00 gain to scale an external 1.25V
reference at REFADJ to 2.5V at VREF.
The MAX1246’s full-scale range with the internal refer-
ence is 2.5V with unipolar inputs and ±1.25V with bipo-
lar inputs. The internal reference voltage is adjustable
to ±1.5% with the circuit in Figure 15.
With both the MAX1246 and MAX1247, an external ref-
erence can be placed at either the input (REFADJ) or
the output (VREF) of the internal reference-buffer ampli-
fier. The REFADJ input impedance is typically 20kΩ for
the MAX1246, and higher than 100kΩ for the MAX1247.
18
______________________________________________________________________________________
DIN
REFADJ
VREF
1
FULLPD
Internal and External References
1.21V
2.50V
Lowest Power at Higher Throughputs
0V
0V
0 0
Internal Reference (MAX1246)
(ZEROS)
External Reference
COMPLETE CONVERSION SEQUENCE
1
= RC = 20k x C
FASTPD
9ms WAIT
0 1
REFADJ
Figure 15. MAX1246 Reference-Adjust Circuit
Table 5. Software Power-Down
and Clock Mode
Table 6. Hard-Wired Power-Down
and Internal Clock Frequency
Floating
t
STATE
BUFFEN
SHDN
1
1
0
PD1
0
0
1
1
NOPD
CH1
100k
24k
200 s
+3.3V
Power-Down
1
DEVICE
Enabled
Enabled
1
MODE
PD0
1
0
1
0
1
FULLPD
510k
CH7
COMPENSATION
0.047µF
REFERENCE
0 0
BUFFER
External
Internal
N/A
(ZEROS)
Fast Power-Down
Full Power-Down
DEVICE MODE
External Clock
Internal Clock
9
REFADJ
1
MAX1246
FASTPD
FREQUENCY
INTERNAL
CLOCK
225kHz
1.8MHz
0 1
N/A