MAX1124 Maxim Integrated Products, MAX1124 Datasheet - Page 14

• Manufacturer Part Number: MAX1124
• Description: 250Msps Analog-to-Digital Converter
• Manufacturer: Maxim Integrated Products

predetermined resistor value between REFADJ and
REFIO increases the full-scale range of the data con-
verter.
and their impact on the overall full-scale range adjust-
ment of the MAX1124. Do not use resistor values of less
than 13kΩ to avoid instability of the internal gain regula-
tion loop for the bandgap reference.
The preferred method of clocking the MAX1124 is differ-
entially with LVDS- or PECL-compatible input levels. To
accomplish this, a 50Ω reverse-terminated clock signal
source with low phase noise is AC-coupled into a fast
differential receiver such as the MC100LVEL16
7). The receiver produces the necessary PECL output
levels to drive the clock inputs of the data converter.
An RF transformer provides an excellent solution to
convert a single-ended source signal to a fully differen-
tial signal, required by the MAX1124 for optimum
dynamic performance. In general, the MAX1124 pro-
vides the best SFDR and THD with fully differential
input signals and it is not recommended to drive the
ADC inputs in single-ended configuration. In differential
input mode, even-order harmonics are usually lower
since INP and INN are balanced, and each of the ADC
inputs only requires half the signal swing compared to
a single-ended configuration.
Figure
transformer into two separate 25Ω loads. Terminating
the transformer in this fashion reduces the potential
effects of transformer parasitics. The source impedance
combined with the shunt capacitance provided by a PC
board and the ADC’s parasitic capacitance reduce the
combined bandwidth to approximately 550MHz.
1.8V, 10-Bit, 250Msps Analog-to-Digital Converter
with LVDS Outputs for Wideband Applications
Figure 8. Transformer-Coupled Analog Input Configuration with Secondary-Side Termination
14
Differential, AC-Coupled, PECL-Compatible
______________________________________________________________________________________
8 depicts a secondary-side termination of the 1:1
Figure
Differential, AC-Coupled Analog Input
6 shows the two possible configurations
INPUT TERMINAL
SINGLE-ENDED
0.1µF
ADT1–1WT
Clock Input
25Ω
25Ω
(Figure
0.1µF
15Ω
15Ω
Although not recommended, the MAX1124 can be
used in single-ended mode
can be AC-coupled to the positive input INP through a
0.1µF capacitor and terminated with a 50Ω resistor to
AGND. The negative input should be 25Ω reverse-ter-
minated and AC grounded with a 0.1µF capacitor.
The MAX1124 requires board layout design techniques
suitable for high-speed data converters. This ADC pro-
vides separate analog and digital power supplies. The
analog and digital supply voltage pins accept input
voltage ranges of 1.7V to 1.9V. Although both supply
types can be combined and supplied from one source,
it is recommended to use separate sources to cut down
on performance degradation caused by digital switch-
ing currents, which can couple into the analog supply
network. Isolate analog and digital supplies (AV
OV
Figure 9. Single-Ended AC-Coupled Analog Input
Configuration
INN
INP
Grounding, Bypassing, and Board
CC
INPUT TERMINAL
SINGLE-ENDED
Single-Ended, AC-Coupled Analog Input
) where they enter the PC board with separate
MAX1124
50Ω
AV
AGND
CC
0.1µF
0.1µF
25Ω
Layout Considerations
OV
INN
INP
OGND
CC
D0P/N–D9P/N
10
(Figure
MAX1124
AV
AGND
CC
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9). Analog signals
OV
OGND
CC
D0P/N–D9P/N
10
CC
and