MAX11040K Maxim Integrated Products, MAX11040K Datasheet - Page 26

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MAX11040K

Manufacturer Part Number
MAX11040K
Description
(MAX11040K / MAX11060) Sigma-Delta ADCs
Manufacturer
Maxim Integrated Products
Datasheet

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There are two ways to use a single line to indicate that
all devices have their data ready, depending on
whether they are clocked synchronously. If all devices
have the same XIN clock and have been synchronized
using SYNC or reset commands, the DRDYOUT of any
device in the chain is used to represent all of them.
Alternatively, if the devices use a different XIN clock,
24-/16-Bit, 4-Channel, Simultaneous-Sampling,
Cascadable, Sigma-Delta ADCs
Figure 14. Configuration Register Read Operation Timing Diagram for Eight Cascaded Devices
26
______________________________________________________________________________________
(CASCIN0 = 0)
CASCOUT0
CASCOUT1
CASCOUT2
CASCOUT3
CASCOUT4
CASCOUT5
CASCOUT6
CASCOUT7
DOUT
SCLK
DIN
CS
DEVICE 0
DEVICE 1
DEVICE 2
DEVICE 3
connect DRDYIN of device 0 to ground, and connect
DRDYIN of device n to the DRDYOUT of device n-1 for
all devices. DRDYOUT does not go low until DRDIN is
low and the conversion of the device is complete. In this
configuration, DRDYOUT of the last device goes low only
when all devices in the chain have their data ready.
DEVICE 4
DEVICE 5
DEVICE 6
DEVICE 7
t
CSW
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