AD9834 Analog Devices, AD9834 Datasheet - Page 2

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AD9834

Manufacturer Part Number
AD9834
Description
+2.5V to +5.5V, 50MHz, Low Power (25mW) Complete DDS With on Board Comparator in 20-pin Tssop Package
Manufacturer
Analog Devices
Datasheet

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Parameter
SIGNAL DAC SPECIFICATIONS
DC Accuracy:
DDS SPECIFICATIONS
Dynamic Specifications:
Spurious Free Dynamic Range (SFDR):
COMPARATOR
OUTPUT BUFFER
VOLTAGE REFERENCE
LOGIC INPUTS
POWER SUPPLIES
NOTES
1
2
3
4
Specifications subject to change without notice. There is 95% test coverage of the digital circuitry.
SPECIFICATIONS
Total Harmonic Distortion
Clock Feedthrough
Wake Up Time
V
V
I
C
AVDD
DVDD
I
I
I
Low Power Sleep Mode
Operating temperature range is as follows: B Version: –40°C to +85°C; typical specifications are at 25 C
Guaranteed by Design.
Applies when REFOUT is sourcing current. The impedance is higher when REFOUT is sinking current.
Measured with the digital inputs static and equal to 0 V or DVDD.
AD9834
INH
AA
AA
DD
Resolution
Update Rate (f
I
Output Compliance
Integral Nonlinearity
Differential Nonlinearity
Signal to Noise Ratio
Wideband (0 to Nyquist)
NarrowBand (± 200 kHz)
Input Voltage Range
Input Capacitance
Input HighPass Cutoff Frequency
Input DC Resistance
Input DC Current
Output Rise/Fall Time
Output Jitter
Internal Reference
REFOUT Input Impedance
Reference TC
INH
INL
IN
OUT
4
, Input Capacitance
4
+ I
, Input Current
, Input Low Voltage
, Input High Voltage
Full Scale
DD
4
MAX
)
2
4
3
PRELIMINARY TECHNICAL DATA
1
Min
50
50
72
1.116
D
D
2
2.3
2.3
VDD
VDD
–0.9
- 0.5
(V
R
Typ
10
±1
±0.5
–55
1
10
4
1
20
100
1.2
1
100
0.5 + 0.04/MHz
7
10
0.25
LOAD
DD
= +2.3 V to +5.5 V; AGND = DGND = 0 V; T
= 200
–2–
for IOUT and IOUTB unless otherwise noted)
Max
50
2.8
0.8
-53
1
10
1.284
0.9
0.5
1
10
5.5
5.5
5
10
15
V p-p
Units
Bits
MSPS
mA
V
LSB
LSB
dB
dBc
dBc
dBc
dBc
ms
pF
MHz
M
ns
ps rms
V
K
ppm/°C
V
V
V
V
V
µA
pF
V
V
mA
mA
mA
mA
mA
A
ac-coupled internally
Test Conditions/Comments
f
f
f
f
Using a 15 pF Load
When DAC data MSB is output
1.2 V ± 7%
+3.6 V to +5.5 V Power Supply
+2.7 V to +3.6 V Power Supply
+2.3 V to + 2.7 V Power Supply
+3.6 V to +5.5 V Power Supply
+2.3 V to + 3.6 V Power Supply
f
3 V Power Supply
5 V Power Supply
DAC and Internal Clock Powered Down
MCLK
MCLK
MCLK
MCLK
MCLK
A
= T
= 50 MHz, f
= 50 MHz, f
= 50 MHz, f
= 50 MHz, f
= 50 MHz, f
MIN
to T
MAX
; R
OUT
OUT
OUT
OUT
OUT
SET
= f
= f
= f
= f
= f
= 6.8 k
MCLK
MCLK
MCLK
MCLK
MCLK
/4096
/4096
/7
/7
/7
REV PrL

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