AD9501 Analog Devices, AD9501 Datasheet - Page 3

• Manufacturer Part Number: AD9501
• Description: Digitally Programmable Delay Generator
• Manufacturer: Analog Devices

REV. A
NOTES
10
11
12
13
14
15
16
Specifications subject to change without notice.
1
2
3
4
5
6
7
8
9
Minimum time from triggering event to rising edge of RESET to insure valid output event, using external RESET pulse. Extends to 125 ns when programmed delay
When self-resetting with a full-scale programmed delay.
Measured from +0.4 V to +2.4 V; source = 1 mA; sink = 4 mA.
Measured from the data input to the time when the AD9501 becomes 8-bit accurate, after a full-scale change in the program delay data word.
Measured from the RESET input to the time when the AD9501 becomes 8-bit accurate, after a full-scale programmed delay.
Supply voltage should remain stable within 5% for normal operation.
Measured at +V
Absolute maximum ratings are limiting values, to be applied individually, and beyond which the serviceability of the circuit may be impaired. Functional operability
is not necessarily implied. Exposure to absolute maximum rating conditions for an extended period of time may affect device reliability.
Typical thermal impedances: 20-lead plastic leaded chip carrier
Digital data inputs must remain stable for the specified time prior to the positive transition of the LATCH signal.
Digital data inputs must remain stable for the specified time after the positive transition of the LATCH signal.
Programmed delay (t
used, maximum trigger rate is 23 MHz.
Programmed delay (t
Programmed delay (t
Measured from 50% transition point of the RESET signal input to the 50% transition point of the falling edge of the output.
Minimum time from the falling edge of RESET to the triggering input to insure valid output pulse, using external RESET pulse.
is 100 ns.
JA
DIE LAYOUT AND MECHANICAL INFORMATION
= 65 C/W;
S
JC
= +5.0 V
= 26 C/W.
D
D
D
) = 0 ns. Maximum self-resetting trigger rate is limited to 6.9 MHz with 100 ns programmed delay. If t
) = 0 ns. In operation, any programmed delays are in addition to the minimum propagation delay (t
) = 0 ns. [Minimum propagation delay (t
5%; specification shown is for worst case.
Test Level
I
II – 100% production tested at +25 C, and sample tested at specified
III – Sample tested only.
IV – Parameter is guaranteed by design and characterization testing.
V – Parameter is a typical value only.
VI – All devices are 100% production tested at +25 C. 100% production
– 100% production tested.
Device
AD9501JN
AD9501JP
AD9501JQ
AD9501SQ
*N = Plastic DIP; P = Plastic Leaded Chip Carrier; Q = Cerdip.
temperatures.
tested at temperature extremes for extended temperature devices;
sample tested at temperature extremes for commercial/industrial
devices.
Temperature
0 C to +70 C
0 C to +70 C
0 C to +70 C
–55 C to +125 C
EXPLANATION OF TEST LEVELS
PD
JA
)].
= 73 C/W;
ORDERING GUIDE
–3–
JC
= 29 C/W. 20-pin ceramic DIP
Description
20-Pin Plastic DIP
20-Lead PLCC
20-Pin Ceramic DIP
20-Pin Ceramic DIP
MECHANICAL INFORMATION
Die Dimensions . . . . . . . . . . . . . . . . . . 89
Pad Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Metalization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Aluminum
Backing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . None
Substrate Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ground
Passivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Oxynitride
Die Attach . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gold Eutectic
Bond Wire . . . . . . . . 1.25 mil, Aluminum; Ultrasonic Bonding
Package
Option*
N-20
P-20A
Q-20
Q-20
JA
= 65 C/W;
PD
or 1 mil, Gold; Gold Ball Bonding
).
D
= 0 ns and external RESET signal is
JC
= 20 C/W. 20-pin plastic DIP
153 15 ( 2) mils
AD9501
4 mils