L64733 LSI Logic Corporation, L64733 Datasheet - Page 29

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L64733

Manufacturer Part Number
L64733
Description
Tuner/receiver Chipset
Manufacturer
LSI Logic Corporation
Datasheet
Table 4
1. x 1.5 harmonic rejection for FLO = 725 MHz.
2. The L63733 is available with the half-harmonic specification guaranteed to 38 dB typical. Contact your
Parameter
MODp, MODn Delay
PLLINp, PLLINn and
MODp, MODn Hold Time
Local Oscillator
LO Tuning Range
LO Phase Noise, Includ-
ing Doubler. Subject to
LC tank implementation.
LO Buffer Frequency
Range when overdriven
by external LO
LO Input Port VSWR
Over Band, when over-
driven by external LO
Required external LO
Input Power Range
(Sheet 3 of 3)
LSI Logic sales representative for further information.
AC Characteristics of the L64733 (Cont.)
L64733/L64734 Tuner and Satellite Receiver Chipset
Condition
Must assert MOD level within this time
period to ensure that the next PSOUT
period gives correct count. Delay is
with respect to rising edge of PSOUT
(previous count).
With respect to rising edge of PSOUT.
This means that PSOUT need not
continue to be asserted after MOD has
given correct count.
1 kHz offset. Depends on PLL loop
gain.
10 kHz offset. Depends on PLL loop
gain.
100 kHz offset
FDOUB = LOW
925 MHz < FLO < 2175 MHz. Assume
series resistors to TANKp and TANKn
pins
Differential drive into TANKp, TANKn.
50
source.
Min
543
925
0
15
Typ
55
75
95
1180
2175
Max
8.5
2:1
5
Units
MHz
dBc/
dBc/
dBc/
MHz
dBm
Hz
Hz
Hz
ns
ns
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