ADP3120 Analog Devices, ADP3120 Datasheet - Page 5

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ADP3120

Manufacturer Part Number
ADP3120
Description
Dual Bootstrapped 12 V MOSFET Driver
Manufacturer
Analog Devices
Datasheet

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PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 3. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
Mnemonic
BST
IN
OD
VCC
DRVL
PGND
SW
DRVH
Figure 2. 8-Lead SOIC Pin Configuration
VCC
BST
OD
IN
1
2
3
4
(Not to Scale)
ADP3120
Description
Upper MOSFET Floating Bootstrap Supply. A capacitor connected between the BST and SW pins holds this
bootstrapped voltage for the high-side MOSFET as it is switched.
Logic Level PWM Input. This pin has primary control of the drive outputs. In normal operation, pulling this pin
low turns on the low-side driver; pulling it high turns on the high-side driver.
Output Disable. When low, this pin disables normal operation, forcing DRVH and DRVL low.
Input Supply. This pin should be bypassed to PGND with an ~1 μF ceramic capacitor.
Synchronous Rectifier Drive. Output drive for the lower (synchronous rectifier) MOSFET.
Power Ground. Should be closely connected to the source of the lower MOSFET.
This pin is connected to the buck-switching node, close to the upper MOSFET source. It is the floating return for
the upper MOSFET drive signal. It is also used to monitor the switched voltage to prevent the lower MOSFET
from turning on until the voltage is below ~1 V.
Buck Drive. Output drive for the upper (buck) MOSFET.
TOP VIEW
8
7
6
5
DRVH
SW
PGND
DRVL
Rev. 0 | Page 5 of 16
Figure 3. 8-Lead LFCSP Pin Configuration
VCC
BST
OD
IN
1
2
3
4
(Not to Scale)
ADP3120
TOP VIEW
PIN 1
INDICATOR
8 DRVH
7 SW
6 PGND
5 DRVL
ADP3120

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