MSC8156 Freescale Semiconductor, Inc, MSC8156 Datasheet - Page 47

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MSC8156

Manufacturer Part Number
MSC8156
Description
Six-core Digital Signal Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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2.6.5
This section describes the AC electrical characteristics for the Ethernet interface.
There are programmable delay units (PDU) that should be programmed differently for each interface to meet timing. There is
a general configuration register 4 (GCR4) used to configure the timing. For additional information, see the MSC8156 Reference
Manual.
2.6.5.1
Table 33
2.6.5.2
Table 34
Freescale Semiconductor
GE_MDC to GE_MDIO delay
GE_MDIO to GE_MDC rising edge setup time
GE_MDC rising edge to GE_MDIO hold time
Notes:
Data to clock output skew (at transmitter)
Data to clock input skew (at receiver)
Notes:
lists the timer input Ethernet controller management interface timing specifications shown in
1.
2.
presents the RGMII AC timing specifications for applications requiring an on-board delayed clock.
1.
2.
3.
4.
Ethernet Timing
Program the GE_MDC frequency (f
source clock and configuration of MIIMCFG[MCS] and UPSMR[MDCP]. For example, for a source clock of 400 MHz to
achieve f
configuration details.
The value depends on the source clock. For example, for a source clock of 267 MHz, the delay is 70 ns. For a source clock of
333 MHz, the delay is 58 ns.
At recommended operating conditions with V
RGMII at 100 MHz support is guaranteed by design.
Program GCR4 as 0x00000000.
This implies that PC board design requires clocks to be routed such that an additional trace delay of greater than 1.5 ns and
less than 2.0 ns is added to the associated clock signal.
Management Interface Timing
RGMII AC Timing Specifications
GE_MDIO
GE_MDIO
GE_MDC
(Output)
Table 34. RGMII at 1 GHz
(Input)
MDC
= 2.5 MHz, program MIIMCFG[MCS] = 0x4 and UPSMR[MDCP] = 0. See the MSC8156 Reference Manual for
2
Table 33. Ethernet Controller Management Interface Timing
Parameter/Condition
Characteristics
MSC8156 Six-Core Digital Signal Processor Data Sheet, Rev. 1
4
Figure 24. MII Management Interface Timing
4
t
MDC
MDC
t
MDDVKH
2
) to a maximum value of 2.5 MHz (400 ns period for t
with On-Board Delay
DDIO
of 2.5 V ± 5%.
t
MDKHDX
t
MDDXKH
3
AC Timing Specifications
t
t
t
Symbol
MDKHDX
MDDVKH
MDDXKH
Symbol
t
t
SKEWR
SKEWT
–-0.5
Min
1
Min
10
MDC
7
0
Electrical Characteristics
). The value depends on the
Typ
Table
Max
70
24.
Max
0.5
2.6
Unit
ns
ns
ns
Unit
ns
ns
47

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