MCP1727 Microchip Technology, MCP1727 Datasheet - Page 22

• Manufacturer Part Number: MCP1727
• Description: Low Quiescent Current LDO Regulator
• Manufacturer: Microchip Technology

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MCP1727
5.3.1.2
To estimate the internal junction temperature, the
calculated temperature rise is added to the ambient or
offset temperature. For this example, the worst-case
junction temperature is estimated below:
As you can see from the result, this application will be
operating very near the maximum operating junction
temperature of 125°C. The PCB layout for this
application is very important as it has a significant
impact on the junction-to-ambient thermal resistance
(Rθ
in this application.
5.3.1.3
From this table, you can see the difference in maximum
allowable power dissipation between the 3x3 DFN
package and the 8-pin SOIC package. This difference
is due to the exposed metal tab on the bottom of the
DFN package. The exposed tab of the DFN package
provides a very good thermal path from the die of the
LDO to the PCB. The PCB then acts like a heatsink,
providing more area to distribute the heat generated by
the LDO.
DS21999B-page 22
3x3DFN (41° C/W Rθ
SOIC8 (150°C/Watt Rθ
JA
P
P
P
P
) of the 3x3 DFN package, which is very important
D(MAX)
D(MAX)
D(MAX)
D(MAX)
T
T
T
J
J
J
Junction Temperature Estimate
Maximum Package Power
Dissipation at 60°C Ambient
Temperature
= T
= 63.14°C + 60.0°C
= 123.14°C
= (125°C – 60°C) / 41° C/W
= 1.585W
= (125°C – 60°C)/ 150° C/W
= 0.433W
JRISE
JA
+ T
JA
):
):
A(MAX)
5.4
C
Where:
For a delay of 300 ms:
C = 333.3E-09 * .300
C = 100E-09uF (0.1 μF)
=
I
ΔV
ΔT
C
•
C
DELAY
I
ΔT
------ -
ΔV
=
=
=
=
=
(
--------------------------------- -
140nA ΔT
Calculations (typical)
C
0.42V
C
C
140 nA typical.
time delay
C
0.42V typical
© 2007 Microchip Technology Inc.
DELAY
DELAY
DELAY
=
•
I
•
ΔT
------ -
ΔV
)
Capacitor
charging current,
threshold voltage,
=
333.3
×10
–
09
•
ΔT