STP1612PW05QTR STMicroelectronics, STP1612PW05QTR Datasheet - Page 23

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STP1612PW05QTR

Manufacturer Part Number
STP1612PW05QTR
Description
16-channel Led Driver With 16-bit Pwm, 8-bit Gain And Full Led Error Detection
Manufacturer
STMicroelectronics
Datasheet
STP1612PW05
13
14
15
For example,
HC = 1, G = 1.25, D = (256x1.25-128)/3 = 64
the D in binary form would be:
D = 64 = 1x2
The bit 9 to bit 2 of the configuration register are set to 8’b1100,0000.
Delay time of staggered output
This feature prevents large inrush current from the power line and reduces the bypass
capacitors.
The outputs are organized in four groups OUT4n, OUT4n+1, OUTn4+2, OUT4n+3 and each
group has 40 ns delay between the previous one.
E.g.: OUT4n has no delay, OUTn4+1 has 40ns delay, OUTn4+2 has 80ns delay, OUTn4+3
has 120 ns delay.
Thermal protection
Thermal flag provides an indication about the status of the junction temperature. When the
junction temperature reaches 150 °C the bit E of the configuration register is set to “1”,
signaling dangerous operating condition. This flag is useful when thermal shutdown function
is disabled.
The thermal shutdown function, if activated by configuration register, turns-off all output
channels if the junction exceeds 150 °C. As soon as the junction temperature is below 140
°C the outputs channels will be turned ON. In thermal shutdown mode, the digital core is
active and data flow is guaranteed.
Time-out alert of GCLK disconnection
When the PWCLK signal is disconnected for around 1 second, all output ports will be turned
off automatically. This function will protect the LED display system from staying ON
indefinitely and prevent excessive current from damaging the power system. The default is
set to ‘enable” when bit “0” is 0. When the PWCLK is active again and new serial data are
moved in, the driver resumes to work after resetting the internal counters and comparators.
6
+0x2
5
+0x2
4
+0x2
Doc ID 15819 Rev 2
3
+0x2
2
+0x2
1
+0x2
0
Delay time of staggered output
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