SI9122 Vishay Siliconix, SI9122 Datasheet - Page 9

no-image

SI9122

Manufacturer Part Number
SI9122
Description
500-kHz Half-Bridge DC-DC Converter With Integrated Secondary Synchronous Rectification Drivers
Manufacturer
Vishay Siliconix
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI9122DQ
Manufacturer:
LINEAR
Quantity:
5 567
Part Number:
SI9122DQ-T1-E3
Manufacturer:
VISHAY/威世
Quantity:
20 000
Company:
Part Number:
SI9122EDQ-T1-E3
Quantity:
12 000
Care needs to be taken if there is a delay prior to the external
circuit feeding back to the V
power dissipation within the IC it is advisable to use an external
PNP device. A pin has been incorporated on the IC,
(REG_COMP) to provide compensation when employing the
external device. In this case the V
base of the PNP device and controls the current, while the
REG_COMP pin determines the frequency compensation of
the circuit. To understand the operation please refer to
Figure
The soft-start circuit is designed for the dc-dc converter to
start-up in an orderly manner and reduce component stress on
the IC. This feature is programmable by selecting an external
C
to the final clamped voltage of 8 V. In the event of UVLO or
shutdown, V
switching. To prevent oscillations, a longer soft-start time may
be needed for high capacitive loads and high peak output
current applications.
Reference
The reference voltage of Si9122 is set at 3.3 V. The reference
voltage is de-coupled externally with 0.1-mF capacitor. The
V
capability.
Voltage Mode PWM Operation
Under normal load conditions, the IC operates in voltage mode
and generates a fixed frequency pulse width modulated signal
to the drivers. Duty cycle is controlled over a wide range to
maintain output voltage under line and load variation. Voltage
feed forward is also included to take account of variations in
supply voltage V
In the half-bridge topology requiring isolation between output
and input, the reference voltage and error amplifier must be
supplied externally, usually on the secondary side. The error
information is thus passed to the power controller through an
opto-coupling device. This information is inverted, hence 0 V
represents the maximum duty cycle, whilst 2 V represents
minimum duty cycle. The error information enters the IC via pin
EP, and is passed to the PWM generator via an inverting
amplifier. The relationship between Duty cycle and V
shown in the Typical Characteristic
25_C
the attenuated V
duty cycle. The relationship between Duty cycle and V
shown in the the Typical Characteristic Graph,
V
At start-up, i.e., once V
initiated under soft-start control which increases primary
switch on-times linearly from D
period. Start-up from a V
under soft-start control.
Half-Bridge and Synchronous Rectification Timing
Sequence
The PWM signal generated within the Si9122 controls the low
and high-side bridge drivers on alternative cycles. A period of
Document Number: 71815
S-41944—Rev. F, 18-Oct-04
REF
INDET,
SS
. An internal 20-mA current source charges C
voltage is 0 V in shutdown mode and has 50-mA source
, page 19. Voltage feedforward is implemented by taking
5.
page 16.
SS
IN
IN
will be held low (<1 V) disabling driver
.
signal at V
CC
INDET
is greater than V
CC
INDET
MIN
supply. To prevent excessive
power down is also initiated
to D
and directly modulating the
IN
Graph,Duty Cycle vs. V
pin is connected to the
MAX
UVLO
over the soft-start
Duty Cycle vs.
, switching is
SS
from 0 V
INDET
EP
EP
is
is
inactivity always results after initiation of the soft-start cycle
until the soft-start voltage reaches approximately 1.2 V and
PWM controlled switching begins. The first bridge driver to
switch is always the low-side, D
high-side boost capacitor.
The timing and coordination of the drives to the primary and
secondary stages is very important and shown in
is essential to avoid the situation where both of the secondary
MOSFETs are on when either the high or the low-side switch
are active. In this situation the transformer would effectively be
presented with a short across the output. To avoid this, a
dedicated break-before-make circuit is included which will
generate non overlapping waveforms for the primary and the
secondary drive signals. This is achieved by a programmable
timer which delays the switching on of the primary driver
relative to the switching off of the related secondary and
subsequently delays the switching on of the secondary relative
to the switching off of the related primary.
Typical variation in the t
is shown in graphs t
is due to a reduction in propagation delay through the high-side
driver path as the L
considered in setting the delay for the system level design.
Variation of BBM time with R
t
Primary High- and Low-Side MOSFET Drivers
The drive voltage for the low-side MOSFET switch is provided
directly from V
the gate voltage to be enhanced above V
by bootstraping the V
high-side MOSFET source). In order to provide the
bootstrapping an external diode and capacitor are required as
shown on the application schematic. The capacitor will charge
up after the low-side driver has turned on. The switch gate
drive signals D
Secondary MOSFET Drivers
The secondary side MOSFETs are driven from the Si9122 via
a center tapped pulse transformer and inverter drivers. The
waveforms from the IC SRH and SRL are shown in
Of importance is the relative voltage between SRH and SRL,
i.e. that which is presented across the primary of the pulse
transformer. When both potentials of SRL and SRH are equal
then by the action of the inverting driver both secondary
MOSFETs are left on.
Oscillator
The oscillator is designed to operate at a nominal frequency of
500 kHz. The 500-kHz operating frequency allows the converter
to minimize the inductor and capacitor size, improving the power
density of the converter. The oscillator and
switching frequency is programmable by attaching a resistor to
the R
is reduced by the current overload protection to enable a constant
current to be maintained into a low impedance circuit.
BBM4
OSC
vs. R
pin. Under overload conditions the oscillator frequency
BBM
CC
H
.
and D
. The high-side MOSFET however requires
BBM3
CC
L
X
BBM3
are shown in
, t
voltage increases and must be
voltage onto the L
BBM4
BBM
and t
L
and for R
as this allows charging of the
is shown in graph t
Vishay Siliconix
BBM4
Figure
delay with L
IN
BBM
. This is achieved
3.
X
= 33 kW. This
www.vishay.com
therefore the
Si9122
voltage (the
Figure
X
Figure
BBM1
voltage
3. It
to
3.
9

Related parts for SI9122