IDT82P2284 Integrated Device Technology, Inc., IDT82P2284 Datasheet - Page 45
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IDT82P2284
Manufacturer Part Number
IDT82P2284
Description
4 Channel T1/J1/E1 Transceiver
Manufacturer
Integrated Device Technology, Inc.
Datasheet
1.IDT82P2284.pdf
(384 pages)
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IDT82P2284
3.8.2.1.3
sor starts to search for CAS Signaling Multi-Frame alignment signal if
the CASEN bit is ‘1’.
nibble (Bit 1 ~ Bit 4) of TS16. Its pattern is ‘0000’. When the pattern is
found in TS16 and the high nibble of the previous TS16 are not all zeros,
the Signaling Multi-Frame synchronization is acquired and it is indicated
with a ‘0’ in the OOSMFV bit. The frame containing the Signaling Multi-
Frame alignment pattern is Frame 0 of Signaling Multi-Frame. The TS16
structure of the Signaling Multi-Frame is shown in Figure 11. The entire
content in TS16 of Frame 0 of Signaling Multi-Frame is ‘0000XYXX’. ‘Y’
is for remote Signaling Multi-Frame alarm indication and ‘X’s are extra
bits. The codeword ‘ABCD’ are the signaling bits for different timeslots.
Functional Description
Figure 11. TS16 Structure Of CAS Signaling Multi-
F15
After the Basic Frame has been synchronized, the Frame Proces-
The Signaling Multi-Frame alignment pattern is located in the high
F0
F1
F2
A
A
A
0
Signaling Multi-Frame
CAS Signaling Multi-Frame
alignment pattern
for TS15
B
B
B
0
for TS1
for TS2
C
C
C
0
TS16 (Bit 1 - Bit 8)
Frame
D
D
D
0
X0
A
A
A
RMAI
Extra Bits
Y
B
for TS17
B
for TS18
B
for TS31
X1
C
C
C
X2
D
D
D
34
3.8.2.2
on monitoring the received data stream to detect errors and judge if it is
out of synchronization.
mined by the WORDERR bit and the CNTNFAS bit (refer to Table 19).
This error event is captured by the FERI bit and is forwarded to the Per-
formance Monitor.
Multi-Frame alignment signals are compared with the expected ones
(‘001011’). When one or more bits do not match, a single CRC Multi-
Frame alignment pattern error event is generated. This error event is
captured by the CMFERI bit.
received CRC Sub Multi-Frame does not match the received CRC-4 of
the next received CRC Sub Multi-Frame, a single CRC-4 error event is
generated. This error event is captured by the CRCEI bit and is for-
warded to the Performance Monitor.
are not less than 915 occasions (915 is included) in a 1 second fixed
window, an excessive CRC-4 error event is generated. This error event
is captured by the EXCRCERI bit.
received Signaling Multi-Frame alignment signals are compared with the
expected ones (‘0000’). When one or more bits do not match, a single
CAS Signaling Multi-Frame alignment pattern error event is generated.
This error event is captured by the SMFERI bit.
tion (E1 or E2) bits is received as a logic 0, a far end block error event is
generated. This error event is captured by the FEBEI bit and is for-
warded to the Performance Monitor.
A bit and a logic 0 is received in any of the E1 or E2 bit for 10 ms, the
RAICRCV bit is set. This bit is cleared if any of the conditions is not met.
E1 or E2 bits on ≥ 990 occasions per second for the latest 5 consecutive
seconds, the CFEBEV bit is set, otherwise this bit will be cleared.
CRC Sub Multi-Frame is matched with ‘0001’ or ‘0011’, the Network Ter-
minal Far End Block Error event is generated. This error event is cap-
tured by the TFEBEI bit and is forwarded to the Performance Monitor.
Table 19: FAS/NFAS Bit/Pattern Error Criteria
WORDERR CNTNFAS
QUAD T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
After the frame is in synchronization, the Frame Processor keeps
The following ten kinds of errors are detected:
1. FAS/NFAS Bit/Pattern Error: The criteria of this error are deter-
2. CRC Multi-Frame Alignment Pattern Error: The received CRC
3. CRC-4 Error: When the local calculated CRC-4 of the current
4. Excessive CRC-4 Error: Once the accumulated CRC-4 errors
5. CAS Signaling Multi-Frame Alignment Pattern Error: The
6. Far End Block Error (FEBE): When any of the CRC error indica-
7. Continuous RAI & FEBE Error: When a logic 1 is received in the
8. Continuous FEBE Error: When a logic 0 is received in any of the
9. NT FEBE Error (per ETS 300 233): If the 4-bit Sa6 codeword of a
0
1
0
1
Error Event And Out Of Synchronization Detection
0
0
1
1
Each bit error in FAS is counted as an error event.
A FAS pattern error is counted as an error event.
Each bit error in FAS or NFAS error is counted as an
error event.
A FAS pattern error or NFAS error is counted as an
error event.
Error Generation
March 22, 2004
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