GS1503 Gennum Corporation, GS1503 Datasheet - Page 49

• Manufacturer Part Number: GS1503
• Description: HD Embedded Audio Codec
• Manufacturer: Gennum Corporation

2.6.2.2
A 6.144MHz (128fs) audio clock must be supplied to the
ACLKA and ACLKB inputs. An audio word clock at 48kHz
(fs) will be output at the WCOUTA and WCOUTB external
pins, as shown in Figure 38.
The user can access the Audio Channel Status Block
information via the AUDIO_CS[183:0] bits in Host Interface
registers 058h to 06Eh. To read the Audio Channel Status
information, the CS_MODE bit 3 of Host Interface register
06Fh should be set HIGH. The embedded audio channel
from which the Channel Status information is to be
extracted is set in the CH_SEL[2:0] bits 2-0 of Host
Interface register 06Fh. The CH_SEL[2:0] setting for audio
channel 1 is 000b, through to 111b for channel 8.
AOUT1/2, AOUT3/4
AOUT5/6, AOUT7/8
Serial Audio Output Modes
WCOUTA/B
ACLKA/B
Y/C b / C r [19:0]
6.144MHz (128 fs)
6.144MHz (128 fs)
Fig. 38 Serial Audio Output Configuration and Timing
VIN[19:0]
ACLKA
ACLKB
64 CLKs
GS1503
49
WCOUTB
WCOUTA
AOUT1/2
AOUT3/4
AOUT5/6
AOUT7/8
The CS_RQST bit must be set HIGH to begin the process of
extracting the Audio Channel Status information. Once
extracted, the GS1503 will set CS_WEND bit HIGH and the
user can access the data for Host Interface registers 058h
to 06Eh.
When DEC_MODE (external pin or register setting) is set
LOW, the audio word clock inputs WCINB and WCINB
should be grounded. See section 2-12.
Audio Channels 1 & 2
Audio Channels 3 & 4
Audio Channels 5 & 6
Audio Channels 7 & 8
64 CLKs
48kHz (fs)
48kHz (fs)
15879 - 1