MB1504L Fujitsu Microelectronics, Inc., MB1504L Datasheet - Page 6

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MB1504L

Manufacturer Part Number
MB1504L
Description
Assp Serial Input PLL Frequency Synthesizer
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet

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MB1504
MB1504H
MB1504L
FUNCTIONAL DESCRIPTIONS
PROGRAMMABLE DIVIDER
The programmable divider consists of a 19-bit shift register, 18-bit latch, 7-bit swallow counter and 11-bit programmable counter.
Serial 19-bit data format is shown below.
S
S
C: Control bit (control bit is set to low)
Data is input from the MSB.
8
1
Last data input
Divide ratio A : 0 to 63
to S
to S
Divide
ratio
18
7
7-BIT SWALLOW COUNTER DIVIDE RATIO
63
A
0
1
:
:
6
Divide ratio of programmable counter setting bits (16 to 2047)
Divide ratio of swallow counter setting bits (0 to 127)
C
S
7
0
0
0
S
1
S
6
0
0
1
Divide ratio of swallow counter
S
2
LSB
S
5
0
0
1
Control bit
S
3
setting bits
S
4
0
0
1
S
4
S
3
0
0
1
S
5
S
2
0
0
1
S
6
S
1
0
1
1
S
7
Divide ratio less than 16 is prohibited
Divide ratio N : 16 to 2047
Data input
Divide
S
8
11-BIT PROGRAMMABLE COUNTER DIVIDE RATIO
2047
ratio
16
17
N
S
9
18
S
0
0
1
10
S
Divide ratio of programmable counter
17
S
0
0
1
11
S
16
S
0
0
1
12
S
setting bits
15
S
0
0
1
13
S
14
S
0
0
1
14
S
13
S
0
0
1
15
S
12
S
1
1
1
16
S
MSB
11
S
0
0
1
17
S
First data input
10
S
0
0
1
18
S
S
9
0
0
1
S
8
0
1
1

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