MB1504L Fujitsu Microelectronics, Inc., MB1504L Datasheet - Page 5

• Manufacturer Part Number: MB1504L
• Description: Assp Serial Input PLL Frequency Synthesizer
• Manufacturer: Fujitsu Microelectronics, Inc.

FUNCTIONAL DESCRIPTIONS
SERIAL DATA INPUT
Serial data input is input using the Data pin, Clock pin and LE pin. The 15-bit programmable reference divider and 18-bit programmable divider are
controlled, respectively.
On rising edge of the clock, one bit of the data shifts into the internal shift registers.
When load enable (LE) is high level (or open), data stored in the shift registers is transferred to the 15-bit latch or 18-bit latch depending upon the control bit
level.
Control data “H” : Data is transferred into the 15-bit latch.
Control data “L” : Data is transferred into the 18-bit latch.
PROGRAMMABLE REFERENCE DIVIDER
The programmable reference divider consists of a 16-bit shift register, 15-bit latch and 14-bit reference counter. Serial 16-bit data format is shown below.
SW: Divide ratio of prescaler setting bit
S
C: Control bit (control bit is set to high)
1
to S
Last data input
14
: Divide ratio of programmable reference counter setting bits (8 to 16383)
SW=“H”: 32
SW=“L” : 64
Divide ratio less than 8 is prohibited
Divide ratio R: 8 to 16383
C
Divide
16383
14-BIT PROGRAMMABLE REFERENCE COUNTER DIVIDE RATIO
ratio
R
8
9
S
1
14
S
0
0
1
S
2
Control bit
LSB
Divide ratio of programmable reference counter setting bits
13
S
0
S
3
0
1
12
S
0
0
1
S
4
11
S
0
0
1
S
5
10
S
0
0
1
S
6
S
9
0
0
1
S
7
Data input
Divide ratio of prescaler setting bit
S
8
0
0
1
S
8
S
7
0
0
1
S
9
10
S
6
0
0
1
S
11
S
5
0
0
1
S
12
S
4
1
1
1
S
MSB
13
S
3
0
0
1
S
14
S
2
0
0
1
S
SW
S
1
0
1
1
First data input
MB1504H
MB1504L
MB1504
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