CT2566 Aeroflex Circuit Technology, CT2566 Datasheet

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CT2566

Manufacturer Part Number
CT2566
Description
CT2566 MIL-STD-1553 to Microprocessor Interface Unit
Manufacturer
Aeroflex Circuit Technology
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
CT25664BF1339.8FKD
Manufacturer:
CRUCIAL
Quantity:
20 000
Features
• Second Source
• PGA Version available, (second source to the BUS-66312)
• Compatible with MIL-STD-1750 CPUs
• Compatible with MOTOROLA, INTEL, and ZILOG CPUs
• Compatible with Aeroflex’s CT2565 BC/RT/MT and CT2512 RT
• Minimizes CPU overhead
• Signal controls for shared memory implementation
• Transfers complete messages to shared memory
• Provides memory mapped 1553 interface
• Packaging – Hermetic Metal
Bus interface. The CT2566 provides an interface by using RAM allowing the CPU to transmit or
receive 1553 traffic simply by accessing the memory. All 1553 message transfers are entirely
memory or I/O mapped. The CT2566 supports 1553 interface devices such as Aeroflex's CT2512
dual RT or the CT2565 dual BC, RT, and MT. The CT2566 operates over the full military -55°C to
+125°C temperature range.
eroflex Circuit T
Aeroflex CT2566 MIL-STD-1553 to Microprocessor Interface Unit simplifies the CPU to 1553 Data
• 78 Pin, 2.1" x 1.87" x .25" PGA type package
• 82 Lead, 2.2" x 1.61 x .18" Flat Package
MSTRCLR
MEM/REG
READYD
SELECT
STRBD
EXTEN
EXTLD
RD/WR
MIL-STD-1553 to Microprocessor
INT
CLOCK IN
echnology
Compatible to the
A15-A00
D15-D00
TIMING
CPU
Figure 1 – Functional Block Diagram
CONTENTION
– Data Bus Modules For The Future © SCDCT2566 REV B 8/10/99
RESOLVER
Interface Unit
BUS-66300
Description
CT2566
CONFIGURATION
START / RESET
MEMORY
TIMING
OPERATION
REGISTERS
INTERRUPT
REGISTER
REGISTER
REGISTER
CONTROL
CONTROLLER
MICROCODE
MASK
GENERATOR
INTERRUPT
STATUS
BLOCK
WORD
CIRCUIT TECHNOLOGY
IOEN
BUSREQ
BUSGRNT
BUSACK
CS
OE
WR
MEMCS
MEMOE
MEMWR
ADRINC
NBGRNT
BCSTART
TAGEN
EOM
SOM
MSGERR
TIMEOUT
STATERR
LOOPERR
CHB/CHA
CTLINB/A
CTLOUT B/A
RTU/BC
MT
DBAC
SSBUSY
SSFLAG
SVCREQ
RESET
www.aeroflex.com
ISO
9001
I

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CT2566 Summary of contents

Page 1

... All 1553 message transfers are entirely memory or I/O mapped. The CT2566 supports 1553 interface devices such as Aeroflex's CT2512 dual RT or the CT2565 dual BC, RT, and MT. The CT2566 operates over the full military -55°C to +125°C temperature range. ...

Page 2

... The CPU uses this RAM to read the received data as well as to store messages to be transmitted onto the Bus. The CT2566 can be used to implement BC, RT operation and can be either memory mapped or I/O mapped to CPU address space. Registers internal to the CT2566 control its operation ...

Page 3

... BUS REQUEST indicating address/data bus available to 1553 device Memory Chip Select. Low from CT2566 to enable external O RAM. Used with RAM type device to read RAM or used in conjunction with MEMWR to write data into RAM. Output Enable. Input from 1553 device used to enable I memory on the parallel bus ...

Page 4

... Message Error. Input from 1553 device when an error occurs I in message sequence. I Input to change active memory map area (0 = area A). Output from CT2566 selecting which area active ( area A). I Input from 1553 device indicating no response time-out. Master Clear. Power-on reset from CPU. Resets DMA in I progress and internal registers to logic “ ...

Page 5

... EXTLD Table 3 – CT2566FP Pin Functions (82 Pin Flat Package) Aeroflex Circuit Technology I/O O Memory Output Enable. Output from CT2566 to enable memory output data. Memory Write. Output pulse from CT2566 to write data bus O data into memory Bus Monitor. Used in conjunction with RTU/BC to set O operating mode ...

Page 6

... BUSACK 28 BUSGRNT N MEMCS 33 MEMOE MEMWR 36 Not Used 37 N/C 38 NBGRNT +5V 41 N/C Table 3 – CT2566FP Pin Functions (82 Pin Flat Package) (Cont.) Aeroflex Circuit Technology PIN NO. FUNCTION 49 A04 50 A05 51 A06 52 A07 53 A08 54 A09 55 A10 56 A11 57 A12 58 A13 59 A14 60 A15 61 ...

Page 7

... MEMORY MANAGEMENT The RAM used by the CT2566 can be any standard static memory with a WRITE STROBE pulse width requirement less than 70ns. The RAM area is broken down into pointers, look-up tables, and data blocks. All 1553 operation control is accomplished through the RAM, including fault monitoring and data block transfers ...

Page 8

... LOOK-UP TABLES In RTU mode a Look-Up Table is provided to allow the CT2566 to store messages in distinct areas of RAM based upon the subaddress of the received command word. See RTU operation for details. The CT2566 uses the T/R and the five subaddress bits to form a pointer into the “ ...

Page 9

... BLOCK ADDR DESCRIPTOR STACKS BLOCK STATUS WORD LOOK-UP TIME TAG WORD TABLE ADDR RESERVED RECEIVED COMMAND WORD DATA BLOCKS DATA BLOCK DATA BLOCK LOOK-UP TABLE DATA (DATA BLOCK ADDR) BLOCKS (1) (2) DATA BLOCK DATA BLOCK SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 ...

Page 10

... NOT USED DEFINITION End of Message. Set by CT2566 (during BC or RTU mode) every time a 1553 message is transferred (regardless of validity). Set by CT2566 for these conditions: Loop Test Failure: Last transmitted word did not match received word. Message Error: Received message contained an address error, one of eight 1553 status bits set, or 1553 specification violated (parity error, Manchester error, etc) ...

Page 11

... LOOPED BACK BY BACK BY CT2565 CT2565 STATUS STATUS DATA WORD WORD WORD LAST MODE CODE DATA WORD DATA WORD LOOPED WITHOUT RECEIVED DATA BACK BY CT2565 MODE CODE BROADCAST WITH DATA COMMAND TRANSMIT WITH DATA DATA BLOCK FORMAT SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 1 2 ...

Page 12

... MSBs define the mode of operation; the four LSBs define the RTU status bits (See Figure 8). All bits in the Configuration Register (except bit 12) will be present on the respective CT2566 output pins to the 1553 device. The MT bit is inverted at the output. To begin transferring messages onto the bus, the CPU must issue a Controller Start Command (See Figure 14) ...

Page 13

... UPDATE TIME TAG INCREMENT STACK POINTER BY FOUR. DECREMENT MESSAGE COUNT * After controller start is issued the subsystem must wait until BCEOM is active before issuing the next controller start. Figure 14 – BC Sequence of Operation (Under CT2566 Control) Aeroflex Circuit Technology DATA BLOCK YES TRANSFERRED OK TRANSFERRED ...

Page 14

... The data associated with the message will be transferred to/from the data block indicated by the Look-Up Table entry for that subaddress system Time Tag is provided by the user the CT2566 will record the time of the SOM sequence in the second word of the Stack entry. ...

Page 15

... RTU EOM Sequence At the end of a 1553 message (valid or invalid) the CT2566 received an EOM pulse and then performs the following: 1. Updates the Block Status Word. 2. Updates the Time Stage if used. ...

Page 16

... The 1553 device will generate an Identification Word for every word that is transferred across the 1553 Data Bus. The CT2566 stores the received 1553 word in the RAM location indicated by the internal Address Register. The contents of this register are incremented by one so that it points to the next word in RAM, and the Identification Word is stored at that location ...

Page 17

... CT2566 Timing Clock MHz Figures 21 through 37 illustrate the timing for the CT2566 and its operation. All timing definitions are listed in the tables below and the appropriate definitions are repeated with each diagram. SYMBOL ...

Page 18

... MAX UNITS - 120 200 120 200 ns MIN MAX UNITS 200 ns * tpw9 200 ns 50 200 ns 50 200 ns 150 - ns SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 ...

Page 19

... READYD pulse width (CPU Handshake) Internal Register delay (read) td7 Figure 21 – CPU reads from internal register Aeroflex Circuit Technology See Note td1 td7 DATA VALID CPU Reads from Internal Register 19 td2 tpw1 MIN MAX UNITS - 200 SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 ...

Page 20

... Aeroflex Circuit Technology See Note td1 td9 td8 CPU Writes to Internal Register Figure 22 – CPU writes to internal register 20 tpw1 DATA LATCHED Configuration Register Only DATA VALID td10 MIN MAX UNITS - 200 SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 td2 ...

Page 21

... Register Data/Address set-up time td9 Aeroflex Circuit Technology td1 td9 DATA FROM EXTERNAL REGISTER CPU Reads from External Register Timing Figure 23 – CPU reads from external register 21 td2 tpw1 MIN MAX UNITS - 200 SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 ...

Page 22

... Figure 24 – CPU writes to external register Aeroflex Circuit Technology See Note td1 td9 VALID VALID td5 CPU DATA CPU Writes to External Register 22 td2 td10 tpw1 tpw4 MIN MAX UNITS - 200 130 SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 ...

Page 23

... CPU MEMOE low delay td9 Aeroflex Circuit Technology See Note td1 td4 RAM ADDRESS VALID RAM DATA VALID CPU Reads from Ram Figure 25 – CPU reads from RAM 23 td2 tpw1 MIN MAX UNITS - 200 115 ns SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 ...

Page 24

... CPU MEMCS low pulse width Aeroflex Circuit Technology td1 tpw3 td3 tpw2 RAM ADDRESS VALID RAM DATA VALID CPU Writes To Ram Figure 26 – CPU writes to RAM 24 td2 tpw1 MIN MAX UNITS - 200 120 SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 ...

Page 25

... Figure 28 – MIL-STD-1553 terminal I/O delay Aeroflex Circuit Technology td2 MIL-STD-1553 TO CT2566 Handshaking CS (55) MEMCS (16) OE (17) MEMOE (56) WR (54) MEMWR (57) MIL-STD-1553 Terminal to Delay 25 td20 td22 MIN MAX UNITS - td17 td18 td19 MIN MAX UNITS - SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 ...

Page 26

... NOTE: The RESET (low) pulse width will be approximately equal to that of MSTRCLR (low). Aeroflex Circuit Technology td14 ADDRESS td23 CT2566 Address Increment tpw15 See Note td6 CT2566 Direct Increment Figure 30 – CT2566 direct reset 26 ADDRESS + 1 MIN MAX UNITS 50 200 ns - 200 ns MIN MAX UNITS - 30 ns 150 - ns SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 ...

Page 27

... IOEN high delay (CPU Handshake) tpw1 READYD pulse width (CPU Handshake) RESET low pulse width tpw5 Aeroflex Circuit Technology td1 Programmed CT2566 Reset Figure 31 – Programmed CT2566 reset 27 td2 tpw1 tpw5 MIN MAX - 200 - SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 UNITS ...

Page 28

MHz Clock (Internal) STRBD (41) SELECT (1) IOEN (42) READYD (3) td9 MEM/REG (10) RD/WR (2) A02 (38) A01 (77) A00 (39) D01 (28) MEMCS (16) MEMWR (57) MEMOE (56) TAGEN (5) BCSTART (46) A15-A00 D15-D00 SYMBOL td9 td10 ...

Page 29

... STACK ADDRESS + 1 TIME TAG BLOCK STATUS WORD STACK POINTER STACK POINTER + 1 STACK ADDRESS + 4 MESSAGE COUNT 29 MIN MAX UNITS - 200 ns * tpw9 STACK ADDRESS + 2 STACK ADDRESS + 3 TRI-STATE TRI-STATE tpw11 STACK POINTER + 2 STACK POINTER + 1 TRI-STATE MESSAGE COUNT + 1 SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 BC EOM ...

Page 30

SOM (7) tpw12 NBGRNT (19) tpw13 MEMCS (16) MEMWR (57) MEMOE (56) TAGEN (5) BCSTART (46) A15-A00 STACK POINTER td15 td14 D15-D00 1553 COMMAND STACK ADDRESS WORD SYMBOL td13 td14 td15 tpw8 tpw12 tpw13 STACK ADDRESS STACK ADDRESS + ...

Page 31

MHz Clock (Internal) EOM (6) tpw9 MEMCS (16) MEMWR (57) MEMOE (56) TAGEN (5) INT (45) tpw10 A15-A00 STACK POINTER STACK ADDRESS D15-D00 STACK ADDRESS BLOCK STATUS WORD SYMBOL DESCRIPTION tpw9 RESET low delay tpw10 MSTRCLR low pulse width ...

Page 32

... A15-A00 D15-D00 SYMBOL DESCRIPTION MT SOM Cycle DMA delay td16 tpw6 BCSTART low pulse width Figure 36 – MT SOM timing (no contention) Aeroflex Circuit Technology MT SOM Timing (No Contention) 32 td16 STACK POINTER STACK ADDRESS MIN MAX UNITS - 120 SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 tpw6 ...

Page 33

... DMA MEMCS low pulse width Figure 37 – DMA Read/Write timing (SOM/EOM cycles) Aeroflex Circuit Technology tah2 tdh2 DMA READ 33 tpw6 tas1 tpw7 tah1 tdh1 tds1 DMA WRITE MIN MAX UNITS SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 ...

Page 34

... SSFLAG 37 A04 30 SSBUSY 76 A03 31 RTU/BC 38 A02 77 A01 32 A14 39 A00 33 A12 78 GND 34 A10 40 GND 35 A08 36 A06 37 A04 38 A02 39 A00 34 SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 (DDIP) Pin Function # 40 GND 41 STRBD 42 IOEN 43 EXTLD 44 CHB/CHA 45 INT 46 BCSTART 47 RESET 48 MSGERR 49 CTLIN B/A 50 CTLOUT B/A 51 TIMEOUT 52 MSTRCLR 53 BUSACK ...

Page 35

... MEMCS 46 A01 33 MEMOE A00 (LSB CASE GND 44 43 GROUND 35 MEMWR N N/C 37 N/C 38 NBGRNT +5V 41 N/C 35 SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 (FP) Pin Function # 42 N/C 43 GROUND 44 CASE GND 45 A00 (LSB) 46 A01 47 A02 48 A03 49 A04 50 A05 51 A06 52 A07 53 A08 54 A09 55 A10 ...

Page 36

... TYP Pin 39 Pin 22 1.800 2.200 MAX .050 .015 Pin 42 1.610 Pin 41 2.000 .050 Lead Centers 41 Leads/Side 36 1.870 .250 MAX Pin 20 Pin 59 .018 DIA TYP Pin 78 Pin 40 .010 ±.002 .180 MAX MAX MAX .080 SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 .250 ...

Page 37

... Ordering Information Screening of MIL-STD-883 Specifications subject to change without notice 37 DESC SMD # Package - - Flat Package Telephone: (516) 694-6700 FAX: (516) 694-6715 Toll Free Inquiries: (800) THE-1553 E-Mail: sales-act@aeroflex.com SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700 Plug in ...

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