CD2231 Intel Corporation, CD2231 Datasheet - Page 111
CD2231
Manufacturer Part Number
CD2231
Description
CD2231 Intelligent Two-channel Lan And Wan Communications Controller
Manufacturer
Intel Corporation
Datasheet
1.CD2231.pdf
(178 pages)
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8.3.2
8.3.2.1
Datasheet
Register Name: TBPR
Register Description: Transmit Bit-Rate Period
Default Value: x’81
Access: Byte Read/Write
Bit 7
Bits 2:0
NOTE: See the description of clock options in
Transmit Baud Rate Generator Registers
Transmit Baud Rate Period Register (TBPR)
This register contains the preload value for the transmit baud rate count. When using one of the
internal clocks or an n-times external clock, the preload value in conjunction with the transmitter
clock source chosen, determines the transmit bit rate. If a 1 external clock or the receive clock is
used, a value of 01h must be loaded in the TBPR.
Bit 6
Intelligent Two-Channel LAN and WAN Communications Controller — CD2231
These three bits select the clock source for the receive baud rate generator or DPLL.
Bit 5
Dpllmd1
clkSel2
0
0
1
1
0
0
0
0
1
1
1
1
Transmit bit rate period (divisor)
Bit 4
Dpllmd0
clkSel1
0
1
0
1
0
0
1
1
0
0
1
1
Section
Encoding
NRZ
NRZI
Manchester
Reserved
Bit 3
5.5.
clkSel0
0
1
0
1
0
1
0
1
Bit 2
Clock Source
Clk 0
Clk 1
Clk 2
Clk 3
Clk 4
Reserved
External clock
Reserved
Motorola Hex Address: x’C3
Bit 1
Intel Hex Address: x’C1
Bit 0
111
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