IS64WV20488 Integrated Silicon Solution, Inc., IS64WV20488 Datasheet - Page 14
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IS64WV20488
Manufacturer Part Number
IS64WV20488
Description
2m X 8 High-speed Cmos Static Ram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet
1.IS64WV20488.pdf
(20 pages)
AC WAVEFORMS
WRITE CYCLE NO. 2
IS61WV20488ALL
IS61WV20488BLL
IS64WV20488BLL
14
Notes:
1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but
2. I/O will assume the High-Z state if OE > V
any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of
the signal that terminates the Write.
ADDRESS
D
OUT
WE
D
OE
CE
IN
LOW
t
SA
(1,2)
DATA UNDEFINED
(WE Controlled: OE is HIGH During Write Cycle)
IH
.
Integrated Silicon Solution, Inc. — www.issi.com —
VALID ADDRESS
t
t
AW
HZWE
t
t
PWE1
WC
HIGH-Z
t
SD
DATA
IN
VALID
t
HD
t
LZWE
t
HA
CE_WR2.eps
ISSI
1-800-379-4774
08/25/06
Rev. A
®