MBM29DL32XTE Fujitsu Microelectronics, Inc., MBM29DL32XTE Datasheet - Page 34

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MBM29DL32XTE

Manufacturer Part Number
MBM29DL32XTE
Description
Flash Memory 32m 4m X 8/2m X 16 Bit Dual Operation
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet
34
MBM29DL32XTE/BE
FUNCTIONAL DESCRIPTION
• Simultaneous Operation
MBM29DL32XTE/BE have feature, which is capability of reading data from one bank of memory while a program
or erase operation is in progress in the other bank of memory (simultaneous operation), in addition to the
conventional features (read, program, erase, erase-suspend read, and erase-suspend program). The bank
selection can be selected by bank address (A
The MBM29DL321TE/BE have two banks which contain
The MBM29DL322TE/BE have two banks which contain
The MBM29DL323TE/BE have two banks which contain
The MBM29DL324TE/BE have two banks which contain
The simultaneous operation can not execute multi-function mode in the same bank. Table 13 shows combination
to be possible for simultaneous operation. (Refer to the Figure 11 Back-to-back Read/Write Timing Diagram.)
*: An erase operation may also be supended to read from or program to a sector not being erased.
• Read Mode
The MBM29DL32XTE/BE have two control functions which must be satisfied in order to obtain data at the outputs.
CE is the power control and should be used for a device selection. OE is the output control and should be used
to gate data to the output pins if a device is selected.
Address access time (t
access time (t
enable access time is the delay from the falling edge of OE to valid data at the output pins. (Assuming the
addresses have been stable for at least t
power-up, it is necessary to input hardware reset or to change CE pin from “H” or “L”
Bank 1 (8KB
Bank 1 (8KB
Bank 1 (8KB
Bank 1 (8KB
Case
1
2
3
4
5
6
7
CE
) is the delay from stable addresses and stable CE to valid data at the output pins. The output
eight sectors) and Bank 2 (64KB
eight sectors, 64KB
eight sectors, 64KB
eight sectors, 64KB
ACC
) is equal to the delay from stable addresses to valid output data. The chip enable
Autoselect Mode
Program Mode
Bank 1 status
Table 13 Simultaneous Operation
Erase Mode *
Read Mode
Read Mode
Read Mode
Read Mode
ACC
-80/90/12
seven sectors) and Bank 2 (64KB
fifteen sectors) and Bank 2 (64KB
thirty-one sectors) and Bank 2 (64KB
-t
OE
15
time.) When reading out a data without changing addresses after
to A
20
) with zero latency.
sixty-three sectors).
fifty-six sectors).
forty-eight sectors).
Autoselect Mode
Bank 2 status
Program Mode
thirty-two sectors).
Erase Mode *
Read Mode
Read Mode
Read Mode
Read Mode

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