MTV212M64 ETC-unknow, MTV212M64 Datasheet - Page 18

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MTV212M64

Manufacturer Part Number
MTV212M64
Description
8051 Embedded Monitor Controller Mtp Type
Manufacturer
ETC-unknow
Datasheet
9. A/D converter
The MTV212M is equipped with four 6-bit A/D converters, S/W can select the current convert channel by
setting the SADC1/SADC0 bit. The refresh rate for the ADC is OSC freq./12288. The ADC compare the input
pin voltage with internal VDD*N/64 voltage (where N = 0 - 63). The ADC output value is N when pin voltage
is greater than VDD*N/64 and smaller than VDD*(N+1)/64.
WDT (w) :
ADC (w) :
ADC (r) :
10. USB Engine
The USB engine includes the Serial Interface Engine (SIE), the low-speed USB I/O transceiver and the 3.3
Volt Regulator. The SIE block performs most of the USB interface function with only minimum support from
S/W. Two endpoints are supported. Endpoint 0 is used to receive and transmit control (including SETUP)
packets while Endpoint 1 is only used to transmit data packets.
The USB SIE handles the following USB bus activity independently:
S/W handles the following tasks:
10.1 USB Device Address
The USBADR register stores the device address. This register is reset to all 0 after chip reset or USB bus
Revision 1.2
1. Bitstuffing/unstuffing
2. CRC generation/checking
3. ACK/NAK
4. TOKEN type identification
5. Address checking
1. Coordinate enumeration by responding to SETUP packets
2. Fill and empty the FIFOs
3. Suspend/Resume coordination
4. Verify and select DATA toggle values
Reg name
WDT
ADC
ADC
WEN
WCLR
WDT2: WDT0 = 0
ENADC
SADC0
SADC1
SADC2
SADC3
10h (w)
18h (w)
Watchdog Timer control register.
ADC control.
ADC convert result.
10h (r)
addr
MYSON
TECHNOLOGY
= 1
= 1
= 1
= 2
= 3
= 4
= 5
= 6
= 7
= 1
= 1
= 1
= 1
= 1
ENADC
WEN
bit7
Enable WatchDog Timer.
Clear WatchDog Timer.
overflow interval = 8 x 0.25 sec.
overflow interval = 1 x 0.25 sec.
overflow interval = 2 x 0.25 sec.
overflow interval = 3 x 0.25 sec.
overflow interval = 4 x 0.25 sec.
overflow interval = 5 x 0.25 sec.
overflow interval = 6 x 0.25 sec.
overflow interval = 7 x 0.25 sec.
Enable ADC.
Select ADC0 pin input.
Select ADC1 pin input.
Select ADC2 pin input.
Select ADC3 pin input.
WCLR
bit6
bit5
- 18 -
bit4
ADC convert Result
SADC3
bit3
SADC2
WDT2
bit2
MTV212M64
SADC1
WDT1
bit1
(Rev. 1.2)
SADC0
WDT0
2000/07/04
bit0

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