IRM7001 Vishay, IRM7001 Datasheet - Page 11

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IRM7001

Manufacturer Part Number
IRM7001
Description
Sir Modulator/demodulator
Manufacturer
Vishay
Datasheet
Design Notes:
1. When internal is used, CLK_SEL should be held low (con-
2. If PULSEMOD is held high and the internal clock is used, the
3. There are two methods of putting the internal oscillator cell in
Document Number: 82576
Revision 17-August-01
nected to GND). In case of external clock CLK_SEL should
be tied high (V
IR_TXD is limited to a duration of 1.6µs irrespective of data
rate. This helps in reducing LED current at lower data rates.
This function cannot be used with external clock (16XCLK).
POWERDN MODE. Firstly, whenever CLKSEL line is
asserted high, the oscillator cell is automatically put in
power down mode. Secondly, the user may also decide to
put the oscillator in power down mode by providing a high
signal on the POWERDN input pin. Normally the POWERDN
pin stays low.
CC
).
PACKAGING
Production Package
The package is SOIC 16 pins (150 mils) plastic package.
Chips will be available in Tape and Reel (2500 units per reel).
QUALITY AND RELIABILITY
E.S.D. and latch-up
Maximum DC current through any pin thus avoiding latch-up:
+/- 100 mA Electrostatic discharge protection: 4000 V for
mono-supply voltage Electrostatic discharge protection: 2000
V for multi-supplies voltages E.S.D. sensitivity: MIL STD-883-
3015.7 Class 2
Specific requirements: environmental endurance
A. Permanence of marking: MIL-STD-883 - Method 2015
B. Solderability: MIL-STD-883 - Method 2003
C. Resistance to soldering heat: MIL-STD-883 - Method 200
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