IR3082A International Rectifier Corp., IR3082A Datasheet - Page 7

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IR3082A

Manufacturer Part Number
IR3082A
Description
9.6v Amd Xphasetm Control Ic
Manufacturer
International Rectifier Corp.
Datasheet
PWM Control Method
The PWM block diagram of the XPhase
trailing edge modulation is used. A high-gain wide-bandwidth voltage type error amplifier in the Control IC is used
for the voltage control loop. An external RC circuit connected to the input voltage and ground is used to program the
slope of the PWM ramp and to provide the feed-forward control at each phase. The PWM ramp slope will change
with the input voltage and automatically compensate for changes in the input voltage. The input voltage can change
due to variations in the silver box output voltage or due to drops in the PCB related to changes in load current.
Frequency and Phase Timing Control
The oscillator is located in the Control IC and its frequency is programmable from 150kHz to 1MHZ by an external
resistor. The output of the oscillator is a 50% duty cycle triangle waveform with peak and valley voltages of
approximately 5V and 1V. This signal is used to program both the switching frequency and phase timing of the
Phase ICs. The Phase IC is programmed by resistor divider RRAMP1 and RRAMP2 connected between the VBIAS
reference voltage and the Phase IC LGND pin. A comparator in the Phase ICs detects the crossing of the oscillator
waveform with the voltage generated by the resistor divider and triggers a clock pulse that starts the PWM cycle.
The peak and valley voltages track the VBIAS voltage reducing potential Phase IC timing errors. Figure 4 shows the
Phase timing for an 8 phase converter. Note that both slopes of the triangle waveform can be used for
synchronization by swapping the RAMP+ and RAMP- pins, as shown in Figure 3.
+
-
50%
DUTY
CYCLE
VBIAS
REGULATOR
CONTROL IC
RAMP GENERATOR
IFB
Page 7 of 33
+
-
ERROR
AMP
IROSC
VDAC
VPEAK
VVALLEY
+
-
VDRP
AMP
VDRP
IIN
RMPOUT
VBIAS
VDAC
VOSNS-
EAOUT
FB
RVFB
RDRP
Figure 3 – IR3082A PWM Block Diagram
TM
architecture is shown in Figure 3. Feed-forward voltage mode control with
RPWMRMP
CPWMRMP
RPWMRMP
CPWMRMP
RPHS1
RPHS2
RPHS1
RPHS2
CSCOMP
CSCOMP
RAMPIN+
RAMPIN-
PWMRMP
RAMPIN+
RAMPIN-
PWMRMP
SCOMP
ISHARE
DACIN
SCOMP
ISHARE
DACIN
BIASIN
EAIN
BIASIN
EAIN
RAMP
SLOPE
ADJUST
RAMP
SLOPE
ADJUST
10K
10K
+
-
+
-
SHARE
ADJUST
ERROR
AMP
SYSTEM
REFERENCE
VOLTAGE
SYSTEM
REFERENCE
VOLTAGE
SHARE
ADJUST
ERROR
AMP
CLOCK
PULSE
GENERATOR
CLOCK
PULSE
GENERATOR
+
+
-
-
20mV
20mV
RAMP
DISCHARGE
CLAMP
RAMP
DISCHARGE
CLAMP
PWM
COMPARATOR
PWM
COMPARATOR
ENABLE
ENABLE
PHASE IC
PHASE IC
-
+
-
+
+
-
+
-
PWM
LATCH
DOMINANT
PWM
LATCH
DOMINANT
S
RESET
R
BODY
BRAKING
COMPARATOR
+
S
RESET
R
BODY
BRAKING
COMPARATOR
+
+
+
CURRENT
SENSE
AMPLIFIER
CURRENT
SENSE
AMPLIFIER
X 0.9
X 0.9
X34
X34
+
-
+
-
GATEH
GATEL
CSIN+
CSIN-
GATEH
GATEL
CSIN+
CSIN-
CCS
CCS
05/02/2006
RCS
RCS
IR3082A
COUT
VIN
VOSNS+
VOUT
GND
VOSNS-

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