ICM7232 Intersil Corporation, ICM7232 Datasheet - Page 5

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ICM7232

Manufacturer Part Number
ICM7232
Description
Numeric/alphanumeric Triplexed Lcd Display Drivers
Manufacturer
Intersil Corporation
Datasheet

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Absolute Maximum Ratings
Supply Voltage (V
Input Voltage (Note 1). . . . . . . . . . . . . . . . . . . . V
Display Voltage (Note 1) . . . . . . . . . . . . . . . . . . . .0.3
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -25
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
Electrical Specifications
AC Specifications
Power Supply Voltage, V
Data Retention Supply Voltage, V
Logic Supply Current, I
Shutdown Total Current, I
Display Voltage Range, V
Display Voltage Setup Current, I
Display Voltage Setup Resistor Value, R
DC Component of Display Signals
Display Frame Rate, f
Input Low Level, V
Input High Level, V
Input Leakage, I
Input Capacitance, C
Output Low Level, V
Output High Level, V
Operating Temperature Range, T
PARALLEL INPUT (ICM7231) See Figure 1
Chip Select Pulse Width, t
Address/Data Setup Time, t
Address/Data Hold Time, t
Inter-Chip Select Time, t
SERIAL INPUT (ICM7232) See Figures 2, 3
Data Clock Low Time, t
Data Clock High Time, t
Data Setup Time, t
Data Hold Time, t
Write Pulse Width, t
Write Pulse to Clock at Initialization, t
Data Accepted Low Output Delay, t
Data Accepted High Output Delay, t
Write Delay After Last Clock, t
1. Due to the SCR structure inherent in these devices, connecting any display terminal or the display voltage terminal to a voltage outside
2.
the power supply to the chip may cause destructive device latchup. The digital inputs should never be connected to a voltage less than
-0.3V below ground, but maybe connected to voltages above V
JA
is measured with the component mounted on an evaluation PC board in free air.
PARAMETER
ILK
DD
PARAMETER
DH
IL
DS
IH
WP
- V
OL
OH
IN
DISP
DD
SS
CL
CL
ICS
DD
V
S
DISP
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5V
CS
DH
DD
DS
CWS
= 5V +10% V
DISP
OP
DD
V+ = 5V +10%, V
ODL
ODH
WLL
DISP
SS
Guaranteed Retention at 2V
Current from V
V
V
V
V
One of Three Identical Resistors in String
(Sample Test Only)
See Figure 5
ICM7231, Pins 30 - 35, 37 - 39, 1
ICM7232, Pins 1, 38, 39 (Note 2)
Pin 37, ICM7232, I
V
Industrial Range
SS
= 0V, -25
DISP
DISP
SS
DISP
DD
- 0.3
= 4.5V, I
SS
= 2V, Current from V
V
V
= 2V
Pin 2 Open
ICM7231, ICM7232
DISP
TEST CONDITIONS
DISP
= 0V, T
o
o
C to 85
V
C to 85
IN
TEST CONDITIONS
OH
DD
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
V
A
+0.3
DD
6.5
= -500 A
o
= -25
to Ground Excluding Display.
o
C
OL
DD
C
9-23
= 1mA
o
but not more than 6.5V above V
Thermal Information
Thermal Resistance (Typical, Note 2)
Maximum Junction Temperature
Maximum Storage Temperature Range . . . . . . . . . .-65
Maximum Lead Temperature (Soldering, 10s) . . . . . . . . . . . . 300
C to 85
PDIP Package . . . . . . . . . . . . . . . . . . .
CERDIP Package . . . . . . . . . . . . . . . .
Ceramic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
DD
to V
o
C, Unless Otherwise Specified
DISP
MIN
On-Chip
500
200
350
350
200
500
350
1.5
0
3
0
-
-
MIN
4.5
2.0
4.1
-25
40
60
2
0
TYP
-
-
-
-
-
-
-
-
350
350
200
-20
-20
1.5
-
-
-
-
-
-
-
SS
.
TYP
1.6
1
0.1
>4
30
15
75
90
1
5
-
/
-
-
-
-
-
4
MAX
400
MAX
V
3
-
-
-
-
-
-
-
-
-
-
-
JA
100
120
+85
5.5
0.8
0.4
10
30
DD
1
-
-
-
1
-
-
(
60
50
o
C/W)
% (V
o
UNITS
DD
UNITS
C to 150
JC
Hz
pF
o
k
V
V
V
V
V
V
V
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
A
A
A
- V
A
C
s
s
s
N/A
(
12
DISP
o
C/W)
o
o
o
o
)
C
C
C
C

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