ADRF6601 Analog Devices, Inc., ADRF6601 Datasheet - Page 16

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ADRF6601

Manufacturer Part Number
ADRF6601
Description
750 Mhz To 1160 Mhz Rx Mixer With Integrated Fractional-n Pll And Vco
Manufacturer
Analog Devices, Inc.
Datasheet
ADRF6601
LO SELECTION LOGIC
The downconverting mixer in the ADRF6601 can be used
without the internal PLL by applying an external differential
LO to Pin 37 and Pin 38 (LON and LOP). In addition, when
using an LO generated by the internal PLL, the LO signal can
be accessed directly at these same pins. This function can be
used for debugging purposes, or the internally generated LO
can be used as the LO for a separate mixer.
Table 9. LO Selection Logic
Pin 16 (PLL_EN)
0
0
1
1
1
1
1
X = don’t care.
Pins
Pin 36 (LODRV_EN)
X
X
X
0
X
1
1
Bit DB6 (PLEN)
0
1
0
1
1
1
Rev. 0 | Page 16 of 24
Register 5 Bits
Bit DB3 (LDRV)
X
X
X
0
1
X
The operation of the LO generation and whether LOP and LON
are inputs or outputs are determined by the logic levels applied
at Pin 16 (PLL_EN) and Pin 36 (LODRV_EN), as well as Bit DB3
(LDRV) and Bit DB6 (PLEN) in Register 5. The combination of
externally applied logic and internal bits required for particular
LO functions is given in Table 9.
1
Output Buffer
Enabled
Enabled
Disabled
Disabled
Disabled
Disabled
Outputs
LO
External
External
External
Internal
Internal
Internal

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