PMMA7450LR2 Freescale Semiconductor, Inc, PMMA7450LR2 Datasheet - Page 9

• Manufacturer Part Number: PMMA7450LR2
• Description: ?2g/?4g/?8g Three Axis Low-g Digital Output Accelerometer
• Manufacturer: Freescale Semiconductor, Inc

available for a communication interface. When CS pin is used
for Slave Select, SPI communication is selected. When CS is
high, I
NOTE: It is recommended to disable I
master device and one or more slave devices. The master is
typically a microcontroller, which provides the serial clock
signal and addresses the slave device(s) on the bus. The
MMA7450L communicates only in slave operation where the
device address is $1D. Multiple read and write modes are
available. The protocol supports slave only operation. It does
not support Hs mode, “10-bit addressing”, “general call” and
:”START byte”.
SINGLE BYTE READ
convert and return sensor data on request. The transmission
of an 8-bit command begins on the falling edge of SCL. After
the eight clock cycles are used to send the command, note
that the data returned is sent with the MSB first once the data
is received.
accelerometer 8-bit I
transmits a start condition (S) to the MMA7450L, slave
address ($1D), with the R/W bit set to “0” for a write, and the
Sensors
Freescale Semiconductor
The MMA7450L has both an I
I
The MMA7450L has an 8-bit ADC that can sample,
2
C is a synchronous serial communication between a
2
C communication is selected and SPI is disabled.
Figure 8. Multiple Bytes Read - The Master is reading multiple sequential registers from the MMA7450L
communication to avoid communication
errors between devices using a different SPI
communication protocol. To disable I
the I
using SPI.
Figure 7
2
Figure 9. Single Byte Write - The Master (MCU) is writing to a single register of the MMA7450L
CDIS bit in I
I
2
Figure 7. Single Byte Read - The Master is reading one address from the MMA7450L
DIGITAL INTERFACE
C SLAVE INTERFACE
2
shows the timing diagram for the
C read operation. The Master (or MCU)
2
C Device Address register
2
C and SPI digital output
2
C during SPI
2
C, set
MMA7450L sends an acknowledgement. Then the Master (or
MCU) transmits the 8-bit address of the register to read and
the MMA7450L sends an acknowledgement. The Master (or
MCU) transmits a repeated start condition (SR) and then
addresses the MMA7450L ($1D) with the R/W bit set to “1” for
a read from the previously selected register. The Slave then
acknowledges and transmits the data from the requested
register. The Master does not acknowledge (NACK) it
received the transmitted data, but transmits a stop condition
to end the data transfer.
MULTIPLE BYTES READ
register address commands after a read command is
received. Therefore, after following the steps of a single byte
read, multiple bytes of data can be read from sequential
registers after each MMA7450L acknowledgment (ACK) is
received until a NACK is received from the Master followed
by a stop condition (SP) signalling an end of transmission.
See
SINGLE BYTE WRITE
condition (ST) to the MMA7450L, slave address ($1D) with
the R/W bit set to “0” for a write, the MMA7450L sends an
acknowledgement. Then the Master (MCU) transmits the 8-
bit address of the register to write to, and the MMA7450L
sends an acknowledgement. Then the Master (or MCU)
transmits the 8-bit data to write to the designated register and
the MMA7450L sends an acknowledgement that it has
received the data. Since this transmission is complete, the
Master transmits a stop condition (SP) to the data transfer.
The data sent to the MMA7450L is now stored in the
appropriate register. See
The MMA7450L automatically increments the received
To start a write command, the Master transmits a start
Figure
8.
Figure
9.
MMA7450L
9