MJW16010A Freescale Semiconductor, Inc, MJW16010A Datasheet - Page 7
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MJW16010A
Manufacturer Part Number
MJW16010A
Description
Npn Silicon Power Transistors
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MJW16010A.pdf
(10 pages)
FORWARD BIAS
transistor: average junction temperature and second break-
down. Safe operating area curves indicate I C – V CE limits of
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipa-
tion than the curves indicate.
T J(pk) is variable depending on power level. Second break-
down pulse limits are valid for duty cycles to 10% but must be
derated when T C
not derate the same as thermal limitations. Allowable current
at the voltages shown on Figures 14a and 14b may be found
at any case temperature by using the appropriate curve on
Figure 16.
case temperatures, thermal limitations will reduce the power
that can be handled to values less than the limitations im-
posed by second breakdown.
REVERSE BIAS
sustained simultaneously during turn–off, in most cases, with
the base–to–emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
accomplished by several means such as active clamping,
RC snubbing, load line shaping, etc. The safe level for these
devices is specified as Reverse Biased Safe Operating Area
and represents the voltage–current condition allowable dur-
ing reverse biased turn–off. This rating is verified under
clamped conditions so that the device is never subjected to
an avalanche mode. Figure 15 gives the RBSOA character-
istics.
1. FBSOA —
decreases dramatically with increasing collector–emitter
Motorola Bipolar Power Transistor Device Data
There are two limitations on the power handling ability of a
The data of Figures 14a and 14b is based on T C = 25 _ C;
T J(pk) may be calculated from the data in Figure 18. At high
For inductive loads, high voltage and high current must be
Allowable dc power dissipation in bipolar power transistors
SWITCHMODE DESIGN CONSIDERATIONS
SAFE OPERATING AREA INFORMATION
0.07
0.05
0.03
0.02
0.01
0.7
0.5
0.3
0.2
0.1
1
0.01
0.02
D = 0.5
0.2
0.1
0.03
0.02
0.03
25 _ C. Second breakdown limitations do
SINGLE PULSE
0.05
0.1
0.2
0.3
0.5
Figure 18. Thermal Response
1
2
t, TIME (ms)
voltage. A transistor which safely dissipates 100 watts at
10 volts will typically dissipate less than 10 watts at its rated
V CEO(sus) . From a power handling point of view, current and
voltage are not interchangeable (see Application Note
AN875).
2. TURN–ON —
FBSOA curves. The 10 µs curve applies for resistive loads,
most capacitive loads, and inductive loads that are clamped
by standard or fast recovery rectifiers. Similarly, the 100 ns
curve applies to inductive loads which are clamped by ultra–
fast recovery rectifiers, and are valid for turn–on crossover
times less than 100 ns (see Application Note AN952).
vide the transistor with an adequate amount of base drive
VERY RAPIDLY at turn–on. More specifically, safe operation
according to the curves is dependent upon base current rise
time being less than collector current rise time. As a general
rule, a base drive compliance voltage in excess of 10 volts is
required to meet this condition (see Application Note
AN875).
3. TURN–OFF —
dependent upon its forward base drive. Gross overdrive vio-
lates the RBSOA curve and risks transistor failure. For this
reason, circuits which use fixed base drive are often more
likely to fail at light loads due to heavy overdrive (see Ap-
plication Note AN875).
4. OPERATION ABOVE V CEO(sus) —
breakdown, base drive is crucial. A rapid application of ade-
quate forward base current is needed for safe turn–on, as is
a stiff negative bias needed for safe turn–off. Any hiccup in
the base–drive circuitry that even momentarily violates either
of these conditions will likely cause the transistor to fail.
Therefore, it is important to design the driver so that its out-
put is negative in the absence of anything but a clean crisp
input signal (see Application Note AN952).
3
R θJC (t) = r(t) R θJC
R θJC = 1 or 0.92 CW
T J(pk) – T C = P (pk) R θJC (t)
Safe turn–on load line excursions are bounded by pulsed
At voltages above 75% of V CEO(sus) , it is essential to pro-
A bipolar transistor’s ability to withstand turn–off stress is
When bipolars are operated above collector–emitter
5
10
20
30
50
P (pk)
DUTY CYCLE, D = t 1 /t 2
100
t 1
t 2
200
MJW16010A
300
500
7
1000