MJW16212 ON Semiconductor, MJW16212 Datasheet - Page 6
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MJW16212
Manufacturer Part Number
MJW16212
Description
Npn Transistor Bipolar Power Deflection Transistor For High And Very High Resolution Monitors
Manufacturer
ON Semiconductor
Datasheet
1.MJW16212.pdf
(12 pages)
are specifically designed to meet the unique requirements of
horizontal deflection circuits in computer monitor
applications. Historically, deflection transistor design was
focused on minimizing collector current fall time. While fall
time is a valid figure of merit, a more important indicator of
circuit performance as scan rates are increased is a new
characteristic, “dynamic desaturation.” In order to assure a
linear collector current ramp, the output transistor must
remain in hard saturation during storage time and exhibit a
rapid turn–off transition. A sluggish transition results in
serious consequences. As the saturation voltage of the
output transistor increases, the voltage across the yoke
The SCANSWITCH series of bipolar power transistors
T1: Ferroxcube Pot Core #1811 P3C8
Primary/Sec. Turns Ratio = 18:6
Gapped for L
P
Table 2. High Resolution Deflection Application Simulator
= 30 H
DYNAMIC DESATURATIION
http://onsemi.com
LB = 1.5 H
CY = 0.01 F
LY = 13 H
MJW16212
6
drops. Roll off in the collector current ramp results in
improper beam deflection and distortion of the image at the
right edge of the screen. Design changes have been made in
the structure of the SCANSWITCH series of devices which
minimize the dynamic desaturation interval. Dynamic
desaturation has been defined in terms of the time required
for the V
and typical performance at optimized drive conditions has
been specified. Optimization of device structure results in a
linear collector current ramp, excellent turn–off switching
performance, and significantly lower overall power
dissipation.
CE
to rise from 1.0 to 5.0 volts (Figures 9 and 10)