MTD1P40E ON Semiconductor, MTD1P40E Datasheet - Page 8

• Manufacturer Part Number: MTD1P40E
• Description: Power Mosfet 1 Amp, 400 Volts
• Manufacturer: ON Semiconductor

total design. The footprint for the semiconductor packages
must be the correct size to ensure proper solder connection
function of the drain pad size. These can vary from the
minimum pad size for soldering to a pad size given for
maximum power dissipation. Power dissipation for a
surface mount device is determined by T
maximum rated junction temperature of the die, R
thermal resistance from the device junction to ambient, and
the operating temperature, T
on the data sheet, P
ratings table on the data sheet. Substituting these values
into the equation for an ambient temperature T
one can calculate the power dissipation of the device. For a
DPAK device, P
Surface mount board layout is a critical portion of the
The power dissipation for a surface mount device is a
The values for the equation are found in the maximum
INFORMATION FOR USING THE DPAK SURFACE MOUNT PACKAGE
D
P
RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
is calculated as follows.
D
D
=
can be calculated as follows:
T
J(max)
POWER DISSIPATION FOR A SURFACE MOUNT DEVICE
A
R
. Using the values provided
JA
− T
100
Figure 15. Thermal Resistance versus Drain Pad
80
60
40
20
A
0
0.190
4.826
Area for the DPAK Package (Typical)
J(max)
A
2
of 25 C,
0.165
4.191
1.75 Watts
http://onsemi.com
JA
A, AREA (SQUARE INCHES)
, the
, the
MTD1P40E
3.0 Watts
4
8
0.100
2.54
5.0 Watts
Board Material = 0.0625
G−10/FR−4, 2 oz Copper
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 1.75 Watts. There
are other alternatives to achieving higher power dissipation
from the surface mount packages. One is to increase the
area of the drain pad. By increasing the area of the drain
pad, the power dissipation can be increased. Although one
can almost double the power dissipation with this method,
one will be giving up area on the printed circuit board
which can defeat the purpose of using surface mount
technology. For example, a graph of R
area is shown in Figure 15.
The 71.4 C/W for the DPAK package assumes the use of
0.118
6
3.0
0.063
1.6
P
T
0.243
6.172
8
A
D
= 25 C
= 150 C − 25 C
inches
mm
71.4 C/W
10
= 1.75 Watts
JA
versus drain pad