HT46R63 Holtek Semiconductor Inc., HT46R63 Datasheet - Page 17

• Manufacturer Part Number: HT46R63
• Description: Ht46r63/ht46c63 -- A/d With Lcd Type 8-bit Mcu
• Manufacturer: Holtek Semiconductor Inc.

still operate until the overflow occurs (a timer/event
counter reloading will occur at the same time).
When the timer/event counter (reading TMRH) is read,
the clock will be blocked to avoid errors. As this may re-
sults in a counting error, this must be taken into consid-
eration by the programmer.
Input/Output Ports
There are 32 bi-directional input/output lines in the mi-
cro-controller, labeled from PA to PD, which are mapped
to the data memory of [12H], [14H], [16H] and [18H], re-
spectively. All of these I/O ports can be used as input and
output operations. For input operation, these ports are
non-latching, that is, the inputs must be ready at the T2
rising edge of instruction MOV A,[m] (m=12H, 14H,
16H or 18H). For output operation, all the data is latched
and remains unchanged until the output latch is rewritten.
Each I/O line has its own control register (PAC, PBC,
PCC, PDC) to control the input/output configuration.
With this control register, CMOS output or schmitt trig-
ger input with or without (depends on options) pull-high
resistor structures can be reconfigured dynamically (i.e.,
on-the fly) under software control. To function as an in-
put, the corresponding latch of the control register has to
be set as 1 . The pull-high resistor (if the pull-high re-
Rev. 2.30
Bit No.
0~2
3
4
5
6
7
Label
TON
TM0
TM1
TE
Unused bits, read as 0
Defines the TMR active edge of the timer/event counter:
In Event Counter Mode (TM1,TM0)=(0,1):
1:count on falling edge;
0:count on rising edge
In Pulse Width measurement mode (TM1,TM0)=(1,1):
1: start counting on the rising edge, stop on the falling edge;
0: start counting on the falling edge, stop on the rising edge
To enable or disable timer counting (0=disabled; 1=enabled)
Unused bit, read as 0
To define the operating mode
01=Event count mode (external clock)
10=Timer mode (internal clock)
11=Pulse width measurement mode
00=Unused
TMRC (0EH) Register
Timer/Event Counter
17
sistor is enabled) will be exhibited automatically. The in-
put sources are also dependent on the control register. If
the control register bit is 1 , the input will read the pad
state ( mov and read-modify-write instructions). If the
control register bit is 0 , the contents of the latches will
move to internal data bus ( mov and read-modify-write
instructions). The input paths (pad state or latches) of
read-modify-write instructions are dependent on the
control register bits. For output function, CMOS is the
only configuration. These control registers are mapped
to locations 13H, 15H, 17H and 19H.
After a chip reset, these input/output lines stay at a high
level (pull-high options) or floating state (non-pull-high
options). Each bit of these input/output latches can be
set or cleared by SET [m].i (m=12H, 14H, 16H or 18H)
instructions. Some instructions first input data and then
follow the output operations. For example, SET [m].i
CLR [m].i , CPLA [m] read the entire port states into
the CPU, execute the defined operations (bit-operation),
and then write the results back to the latches or the ac-
cumulator.
Each line of port A has the capability of waking-up the
device. The pull-high resistor of each I/O line is decided
by options.
Function
HT46R63/HT46C63
March 22, 2006