ZY2105 Power-One, ZY2105 Datasheet - Page 12
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ZY2105
Manufacturer Part Number
ZY2105
Description
Zy2105 5a No-bus Pol
Manufacturer
Power-One
Datasheet
1.ZY2105.pdf
(14 pages)
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8.
8.1
The open drain input/output with the internal pull-up
resistor. The POL converter pulls its OK pin low, if a
fault occurs. Pulling low the OK input by an external
circuitry turns off the POL converter.
8.2
The bidirectional input/output with the internal pull-up
resistor.
master, the SYNC line propagates clock to other
POL converters. If the POL converter is configured
as a slave, the internal clock recovery circuit
synchronizes to the clock of the SYNC line.
8.3
The input with the internal pull-up resistor. Pulling
the IM pin low configures a POL converter as a
master.
8.4
The open drain input/output with the internal pull-up
resistor. The pin is pulled low by the POL converter,
if the output voltage is outside of the window defined
by the Power Good High and Low thresholds.
Note: See the No-Bus Application Note for recommendations on
8.5
The input with internal pull-up to select one of 2 sets
of digital filter coefficients optimized for different
characteristics of output capacitance.
8.6
The output of the 2V internal voltage reference that
is used to program the output voltage of the POL
converter.
8.7
The input with the internal pull-up resistor. The POL
converter is turned off, when the pin is pulled low
8.8
The input of the TRIM comparator for the output
voltage programming.
The output voltage can be programmed by a single
resistor connected between MARGIN and TRIM
pins.
ZD-01967 REV. B1.1
Pin and Feature Description
PG deglitching.
OK, Fault Status
SYNC, Frequency Synchronization Line
IM, Interleave Mode
PG, Power Good
CCA, Compensation Coefficient Address
MARGIN, Output Voltage Margining
EN, Enable
TRIM, Output Voltage Trim
If the POL converter is configured as a
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8V to 14V Input
9.
9.1
Resistance of the trim resistor is determined from the
equation below:
where V
If the R
PGND, the V
9.2
Margining can be implemented by changing the
resistance between the REF and TRIM pins.
In the schematic shown in Figure 13, the nominal
output voltage is set with the trim resistor R
calculated from the equation in the paragraph 9.1.
Resistors R
output voltage up and down respectively and
determined from the equations below.
Up Switch
Margining
ZY2105 5A No-Bus POL Data Sheet
R
(normally
TRIM
open)
Application Information
R
R
Output Voltage Programming
Output Voltage Margining
UP
=
DOWN
OUT
TRIM
20
=
Figure 13. Margining Configuration
×
is the desired output voltage in Volts.
UP
20
20
is open or the TRIM pin is shorted to
OUT
5 (
R
=
V
×
and R
+
UP
5 .
Down Switch
OUT
(
=0.5V.
20
R
R
Margining
(normally
−
closed)
TRIM
TRIM
V
+
OUT
R
DOWN
•
TRIM
×
0.5V to 5.5V Output
)
,
5
R
)
kΩ
are added to margin the
×
×
R
DOWN
R
TRIM
100
TRIM
∆
V
Page 12 of 14
∆
%
−
V
−
∆
%
∆
MARGIN
TRIM
GND
V
V
%
%
, kΩ
, kΩ
POL
TRIM