LMX2485 National Semiconductor Corporation, LMX2485 Datasheet - Page 26

• Manufacturer Part Number: LMX2485
• Description: 50 Mhz - 3.0 Ghz High Performance Delta-sigma Low Power Dual Pllatinum 50 Mhz - 3.0 Ghz High Performance Delta-sigma Low Power Dual Pllatinum? Frequency Synthesizers With 800 Mhz Integer Pll
• Manufacturer: National Semiconductor Corporation

www.national.com
REGISTER
Programming Description
2.1 R0 REGISTER
Note that this register has only one control bit, so the N counter value to be changed with a single write statement to the PLL.
2.1.1 RF_FN[11:0] -- Fractional Numerator for RF PLL
Refer to section 2.6.1 for a more detailed description of this control word.
2.1.2 RF_N[10:0] -- RF N Counter Value
The RF N counter contains an 8/9/12/13 and a 16/17/20/21 prescaler. The N counter value can be calculated as follows:
N = RF_P·RF_C + 4·RF_B + RF_A
RF_C ≥Max{RF_A, RF_B} , for N-2
RF_B counter has an unused bit, where this extra bit is used by the delta-sigma modulator for the purposes of modulation.
Consult the tables below for valid operating ranges for each prescaler.
Operation with the 8/9/12/13 Prescaler (RF_P=0)
Operation with the 16/17/20/21 Prescaler (RF_P=1)
R0
2040-2043
2044-2045
>
RF_N
25-26
27-30
1023
<
1023
>
31
RF_N
49-50
51-54
...
2039
25
<
2045
55
...
49
23
0
1
.
22
0
1
.
21
0
1
.
0
1
20
.
19
0
1
.
RF_N[10:0]
FM
Possible with a second or third order delta-sigma engine.
0
1
-1 ... N+2
.
RF_C [6:0]
Possible only with a second or third order delta-sigma engine.
Possible only with a second order delta-sigma engine.
18
RF_C [6:0]
Possible only with a second order delta-sigma engine.
Possible with a second or third order delta-sigma engine.
0
1
.
Possible only with a second order delta-sigma engine.
17
(Continued)
0
1
.
FM
N values less than 49 are prohibited.
N values greater than 2045 are prohibited.
16
is a necessary condition. This rule is slightly modified in the case where the
N values less than 25 are prohibited.
N values above 1023 are prohibited.
0
1
.
0
1
.
15
14
1
1
.
DATA[22:0]
26
RF_N [10:0]
1
1
.
RF_N [10:0]
13
1
1
.
12
1
1
.
11
0
0
0
10
RF_B [1:0]
0
0
.
RF_B [1:0]
9
RF_FN[11:0]
8
1
1
.
7
1
1
.
6
5
1
1
.
RF_A [1:0]
4
1
1
RF_A [1:0]
.
3
2
1
1
.
1
1
.
1
C0
0
0