MT8HTF12864AY-1GA Micron Semiconductor Products, MT8HTF12864AY-1GA Datasheet - Page 13

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MT8HTF12864AY-1GA

Manufacturer Part Number
MT8HTF12864AY-1GA
Description
256mb, 512mb, 1gb X64, Sr 240-pin Ddr2 Sdram Udimm
Manufacturer
Micron Semiconductor Products
Datasheet
Serial Presence-Detect
Table 14:
Table 15:
Serial Presence-Detect Data
PDF: 09005aef80e2ff8d/Source: 09005aef80e2ff59
HTF8C32_64_128x64A.fm - Rev. F 10/07 EN
Parameter/Condition
Parameter/Condition
Supply voltage
Input high voltage: Logic 1; All inputs
Input low voltage: Logic 0; All inputs
Output low voltage: I
Input leakage current: V
Output leakage current: V
Standby current
Power supply current, READ: SCL clock frequency = 100 kHz
Power supply current, WRITE: SCL clock frequency = 100 kHz
SCL LOW to SDA data-out valid
Time the bus must be free before a new transition can start
Data-out hold time
SDA and SCL fall time
Data-in hold time
Start condition hold time
Clock HIGH period
Noise suppression time constant at SCL, SDA inputs
Clock LOW period
SDA and SCL rise time
SCL clock frequency
Data-in setup time
Start condition setup time
Stop condition setup time
WRITE cycle time
Serial Presence-Detect EEPROM DC Operating Conditions
Serial Presence-Detect EEPROM AC Operating Conditions
Notes:
OUT
IN
= 3mA
OUT
= GND to V
1. To avoid spurious start and stop conditions, a minimum delay is placed between SCL = 1 and
2. This parameter is sampled.
3. For a restart condition or following a WRITE cycle.
4. The SPD EEPROM WRITE cycle time (
For the latest serial presence-detect data, refer to Micron’s SPD page:
SPD.
= GND to V
the falling or rising edge of SDA.
sequence to the end of the EEPROM internal ERASE/PROGRAM cycle. During the WRITE
cycle, the EEPROM bus interface circuit is disabled, SDA remains HIGH due to the pull-up
resistance, and the EEPROM does not respond to its slave address.
DD
256MB, 512MB, 1GB (x64, SR) 240-Pin DDR2 SDRAM UDIMM
DD
13
Symbol
t
t
t
t
t
HD:DAT
HD:STA
SU:DAT
SU:STO
SU:STA
t
t
t
Symbol
t
HIGH
LOW
f
WRC
t
t
V
BUF
SCL
AA
DH
t
t
t
I
R
DDSPD
F
I
V
I
V
CC W
t
V
I
CC R
I
WRC) is the time from a valid stop condition of a write
I
LO
SB
OL
LI
IH
IL
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Min
200
100
0.2
1.3
0.6
0.6
1.3
0.6
0.6
V
0
DDSPD
Min
–0.6
0.10
0.05
1.7
1.6
0.4
2.0
× 0.7
Max
300
400
0.9
0.3
50
10
Serial Presence-Detect
V
V
©2003 Micron Technology, Inc. All rights reserved.
DDSPD
DDSPD
Max
3.6
0.4
3.0
3.0
4.0
1.0
3.0
+ 0.5
× 0.3
Units
kHz
www.micron.com/
ms
µs
µs
ns
ns
µs
µs
µs
ns
µs
µs
ns
µs
µs
Units
Notes
mA
mA
µA
µA
µA
V
V
V
V
1
2
2
3
4

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