MT8JSF12864HZ Micron Semiconductor Products, MT8JSF12864HZ Datasheet - Page 17
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MT8JSF12864HZ
Manufacturer Part Number
MT8JSF12864HZ
Description
Ddr3 Sdram Sodimm
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT8JSF12864HZ.pdf
(22 pages)
Table 19: Capability Register Bit Description (Continued)
Configuration Register
Table 20: Configuration Register (Address: 0x01)
Table 21: Configuration Register Bit Descriptions
PDF: 09005aef83364a85
jsf8c128_256x64hz.pdf - Rev. C 1/10 EN
Critical lock
Bit
RFU
0
1
2
3
4
5
15
bit
7
15:5
Bit
4:3
Description
Event mode
0: Comparator mode
1: Interrupt mode
EVENT# polarity
0: Active LOW
1: Active HIGH
Critical event only
0: EVENT# trips on alarm or critical temperature event
1: EVENT# trips only if critical temperature is reached
Event output control
0: Event output disabled
1: Event output enabled
Event status
0: EVENT# has not been asserted by this device
1: EVENT# is being asserted due to an alarm window
or critical temperature condition
Clear event
0: No effect
1: Clears the event when the temperature sensor is in
the interrupt mode
Alarm lock bit
Description
Temperature resolution
00: 0.5°C LSB
01: 0.25°C LSB
10: 0.125°C LSB
11: 0.0625°C LSB
0: Must be set to zero
RFU
14
6
1GB, 2GB (x64, SR) 204-Pin Halogen-Free DDR3 SDRAM SODIMM
Clear event
RFU
13
5
Temperature Sensor with Serial Presence-Detect EEPROM
Event output
status
RFU
12
4
Bit
Bit
17
Event output
control
RFU
11
3
Notes
Event mode cannot be changed if either of the lock
bits is set.
EVENT# polarity cannot be changed if either of the
lock bits is set.
This is a read-only field in the register. The event caus-
ing the event can be determined from the read tem-
perature register.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Critical event
only
10
2
Hysteresis
Event polarity
© 2010 Micron Technology, Inc. All rights reserved.
9
1
Event mode
Shutdown
mode
8
0